OpenCores
URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] - Rev 96

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
96 Fixed EraseROM command in the TCL library of the Software development tools. olivier.girard 4852d 12h /openmsp430/trunk/fpga/
94 Thanks to Mihai-Costin Manolescu's contribution, the simulation scripts now support the following simulators:
- Icarus Verilog
- Cver
- Verilog-XL
- NCVerilog
- Modelsim		 olivier.girard 4855d 12h /openmsp430/trunk/fpga/
91 Fixed bug when an IRQ arrives while CPU is halted through the serial debug interface.
This bug is CRITICAL for people using working with interrupts and the Serial Debug Interface.		 olivier.girard 4859d 13h /openmsp430/trunk/fpga/
86 Update serial debug interface test patterns to make them work with all program memory configurations. olivier.girard 4882d 10h /openmsp430/trunk/fpga/
85 Diverse RTL cosmetic updates. olivier.girard 4882d 11h /openmsp430/trunk/fpga/
84 Update SRAM model in the core testbench to prevent the IEEE warning when running simulations.
Update watchdog to fix NMI synchronisation problem.
Add synchronizers for the PUC signal in the debug interface.		 olivier.girard 4887d 12h /openmsp430/trunk/fpga/
83 Add Oscilloscope screenshot + link to the original game. olivier.girard 4933d 12h /openmsp430/trunk/fpga/
82 Update Actel example project:
- synthesis scripts.
- Spacewar demo program.
- SVN ignore patterns for diverse directories		 olivier.girard 4933d 13h /openmsp430/trunk/fpga/
81 Initial synthesis, P&R setup for the Actel example project. olivier.girard 4936d 11h /openmsp430/trunk/fpga/
80 Create initial version of the Actel FPGA implementation example. olivier.girard 4936d 19h /openmsp430/trunk/fpga/
79 Update the GPIO peripheral to fix a potential synchronization issue. olivier.girard 4948d 13h /openmsp430/trunk/fpga/
74 Update serial debug interface to support memories with a size which is not a power of 2.
Update the software tools accordingly.		 olivier.girard 5035d 13h /openmsp430/trunk/fpga/
73 Update all bash scripts headers with "#!/bin/bash" instead of "#!/bin/sh".
This will prevent compatibility problems in systems where bash isn't the default shell.		 olivier.girard 5060d 13h /openmsp430/trunk/fpga/
72 Expand configurability options of the program and data memory sizes. olivier.girard 5062d 14h /openmsp430/trunk/fpga/
71 Update the FPGA example projects with the newer openMSP430 core including the hardware multiplier. olivier.girard 5209d 12h /openmsp430/trunk/fpga/
61 Update openMSP430 rtl. olivier.girard 5241d 10h /openmsp430/trunk/fpga/
59 Update the FPGA projects with the latest core design updates. olivier.girard 5243d 09h /openmsp430/trunk/fpga/
54 Update FPGA projects with the combinatorial loop fixed. olivier.girard 5248d 14h /openmsp430/trunk/fpga/
43 Re-add documentation (earlier pdf was broken). olivier.girard 5277d 10h /openmsp430/trunk/fpga/
42 olivier.girard 5277d 10h /openmsp430/trunk/fpga/
41 Update bitstream & SVN ignore patterns. olivier.girard 5277d 10h /openmsp430/trunk/fpga/
40 Minor updates. olivier.girard 5277d 11h /openmsp430/trunk/fpga/
39 Update FPGA projects with new openMSP430 core. olivier.girard 5277d 11h /openmsp430/trunk/fpga/
38 Remove old core version. olivier.girard 5277d 11h /openmsp430/trunk/fpga/
37 olivier.girard 5277d 11h /openmsp430/trunk/fpga/
36 Remove old core version. olivier.girard 5277d 12h /openmsp430/trunk/fpga/
32 Minor update to the HTML documentation + add some SVN ignore properties to the Altera FPGA project simulation directory. olivier.girard 5279d 10h /openmsp430/trunk/fpga/
30 Add Altera Cyclone II FPGA project example (thanks to Vadim Akimov contribution). olivier.girard 5279d 11h /openmsp430/trunk/fpga/
29 Add Altera Cyclone II FPGA project example. olivier.girard 5279d 12h /openmsp430/trunk/fpga/
28 renamed "diligent_s3board" directory to "xilinx_diligent_s3board" olivier.girard 5287d 20h /openmsp430/trunk/fpga/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.