| Rev |
Log message |
Author |
Age |
Path |
| 123 |
Implementation of l.mfspr and l.mtspr corrected to use bitwise OR rather than addition. Associated tests added. |
jeremybennett |
5185d 04h |
/openrisc/ |
| 122 |
Added l.ror and l.rori with associated tests. |
jeremybennett |
5186d 00h |
/openrisc/ |
| 121 |
Adds exception handling to l.jalr and l.jr. Adds appropriate tests. |
jeremybennett |
5186d 01h |
/openrisc/ |
| 120 |
Documents exception generation by l.jalr and l.jr |
jeremybennett |
5186d 01h |
/openrisc/ |
| 119 |
Updated to clarify exceptions for division and details of multiplication. |
jeremybennett |
5186d 12h |
/openrisc/ |
| 118 |
New tests of multiply. Improved tests of exception handling for addition and division. Improvements to instruction testing library. |
jeremybennett |
5186d 21h |
/openrisc/ |
| 117 |
Updates on l.ff1, l.fl1 and l.maci. |
jeremybennett |
5189d 00h |
/openrisc/ |
| 116 |
Updated to fix l.maci and add tests for l.mac, l.maci, l.macrc and l.msb. Fixed bugs in the old Or1ksim mul test at the same time. |
jeremybennett |
5189d 01h |
/openrisc/ |
| 115 |
Added support for l.fl1 and tests for l.ff1 and l.fl1 |
jeremybennett |
5190d 00h |
/openrisc/ |
| 114 |
l.addic added. Tests of l.add, l.addc, l.addi and l.addic completed. All set overflow correctly, triggering a range exception if the OVE bit is set in the SR. |
jeremybennett |
5190d 01h |
/openrisc/ |
| 113 |
Updates to exception handling for l.add and l.div |
jeremybennett |
5191d 00h |
/openrisc/ |
| 112 |
Tidy ups to Ethernet test fixes. new tests for l.add. Fixes so l.add computes overflow correctly, and generates a range exception if the the OVE bit is set in the supervision register. |
jeremybennett |
5191d 00h |
/openrisc/ |
| 111 |
Changed conditionals for Verilator to "verilator" instead of "VERILATOR". |
jeremybennett |
5191d 05h |
/openrisc/ |
| 110 |
or1ksim make check should work without a libc in the or32-elf tools |
julius |
5192d 02h |
/openrisc/ |
| 109 |
or_debug_proxy does signals with signals, just ignores signals |
julius |
5192d 10h |
/openrisc/ |
| 108 |
Updated to clarify overflow and exceptions for l.add, l.addc, l.addi, l.addic, l.div and l.divu. |
jeremybennett |
5194d 00h |
/openrisc/ |
| 107 |
New instruction set testing infrastructure. Fix for l.div/li.divu (Bug 1770) and tests for that bug. |
jeremybennett |
5194d 01h |
/openrisc/ |
| 106 |
Removing old tests, pending addition of new ones. |
jeremybennett |
5194d 01h |
/openrisc/ |
| 105 |
Tagging the 0.4.0rc1 candidate release of Or1ksim |
jeremybennett |
5197d 08h |
/openrisc/ |
| 104 |
Candidate release 0.4.0rc4 |
jeremybennett |
5197d 08h |
/openrisc/ |
| 103 |
Updated to clarify lf.madd.d and lf.madd.s opcodes. |
jeremybennett |
5198d 04h |
/openrisc/ |
| 102 |
added linux-2.6.34 and uClibc-0.9.31 patch file |
marcus.erlandsson |
5204d 12h |
/openrisc/ |
| 101 |
ChangeLog updated for floating point support. Fixed bug in generic peripheral upcalls. Upped release date in configure.ac. Removed redundant debugging print in abstract.c |
jeremybennett |
5206d 02h |
/openrisc/ |
| 100 |
Single precision FPU stuff for or1ksim |
julius |
5206d 04h |
/openrisc/ |
| 99 |
Bug in test evaluation for library fixed. |
jeremybennett |
5211d 02h |
/openrisc/ |
| 98 |
Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. |
jeremybennett |
5212d 03h |
/openrisc/ |
| 97 |
Updates to test the new JTAG library interface (not yet complete). |
jeremybennett |
5226d 09h |
/openrisc/ |
| 96 |
Various changes which had not been picked up in earlier commits. |
jeremybennett |
5227d 11h |
/openrisc/ |
| 95 |
Some tidy ups to the DejaGNU testing.
All Mark Jarvin's fixes for Mac OS X. |
jeremybennett |
5229d 03h |
/openrisc/ |
| 94 |
Finally added byte reading to or_debug_proxy |
julius |
5231d 23h |
/openrisc/ |
