| Rev |
Log message |
Author |
Age |
Path |
| 140 |
Changes to ORPMon, probably broke flash loading, improved TFTP |
julius |
5126d 10h |
/openrisc/ |
| 139 |
added rel3 info in tags-directory, to avoid misunderstanding |
marcus.erlandsson |
5127d 09h |
/openrisc/ |
| 138 |
fixed check-in mistake (remove additional directory level) |
marcus.erlandsson |
5127d 09h |
/openrisc/ |
| 137 |
Release-2 of the OR1200 processor, latest version is always located in trunk-directory |
marcus.erlandsson |
5127d 11h |
/openrisc/ |
| 136 |
Adding crossbild script, updating MOF install script to use or1ksim-0.4.0 |
julius |
5128d 07h |
/openrisc/ |
| 135 |
Tagging the 0.4.0 stable release of Or1ksim |
jeremybennett |
5133d 11h |
/openrisc/ |
| 134 |
Updates for stable release 0.4.0 |
jeremybennett |
5133d 11h |
/openrisc/ |
| 133 |
Patches for floating point support |
jeremybennett |
5137d 08h |
/openrisc/ |
| 132 |
This fixes files formatted with DOS line endings (something that should be sorted out outside SVN). |
jeremybennett |
5137d 08h |
/openrisc/ |
| 131 |
This brings the OpenRISC repository for GDB 6.8 into line with the patched
tool which is distributed. Missing Makefile.in and configure files are added. |
jeremybennett |
5137d 08h |
/openrisc/ |
| 130 |
Updating uclibc patch |
julius |
5138d 11h |
/openrisc/ |
| 129 |
Previous commit was before saving file. |
jeremybennett |
5139d 07h |
/openrisc/ |
| 128 |
Tagging the 0.4.0rc2 candidate release of Or1ksim |
jeremybennett |
5139d 07h |
/openrisc/ |
| 127 |
New config option to allow l.xori with unsigned operand. |
jeremybennett |
5139d 08h |
/openrisc/ |
| 126 |
More explanation of l.xori. |
jeremybennett |
5139d 08h |
/openrisc/ |
| 125 |
Update to specification of l.xori. |
jeremybennett |
5139d 15h |
/openrisc/ |
| 124 |
Overflow handling now in line with architecture manual. Tests added. |
jeremybennett |
5140d 04h |
/openrisc/ |
| 123 |
Implementation of l.mfspr and l.mtspr corrected to use bitwise OR rather than addition. Associated tests added. |
jeremybennett |
5140d 08h |
/openrisc/ |
| 122 |
Added l.ror and l.rori with associated tests. |
jeremybennett |
5141d 04h |
/openrisc/ |
| 121 |
Adds exception handling to l.jalr and l.jr. Adds appropriate tests. |
jeremybennett |
5141d 04h |
/openrisc/ |
| 120 |
Documents exception generation by l.jalr and l.jr |
jeremybennett |
5141d 04h |
/openrisc/ |
| 119 |
Updated to clarify exceptions for division and details of multiplication. |
jeremybennett |
5141d 16h |
/openrisc/ |
| 118 |
New tests of multiply. Improved tests of exception handling for addition and division. Improvements to instruction testing library. |
jeremybennett |
5142d 01h |
/openrisc/ |
| 117 |
Updates on l.ff1, l.fl1 and l.maci. |
jeremybennett |
5144d 04h |
/openrisc/ |
| 116 |
Updated to fix l.maci and add tests for l.mac, l.maci, l.macrc and l.msb. Fixed bugs in the old Or1ksim mul test at the same time. |
jeremybennett |
5144d 04h |
/openrisc/ |
| 115 |
Added support for l.fl1 and tests for l.ff1 and l.fl1 |
jeremybennett |
5145d 04h |
/openrisc/ |
| 114 |
l.addic added. Tests of l.add, l.addc, l.addi and l.addic completed. All set overflow correctly, triggering a range exception if the OVE bit is set in the SR. |
jeremybennett |
5145d 05h |
/openrisc/ |
| 113 |
Updates to exception handling for l.add and l.div |
jeremybennett |
5146d 04h |
/openrisc/ |
| 112 |
Tidy ups to Ethernet test fixes. new tests for l.add. Fixes so l.add computes overflow correctly, and generates a range exception if the the OVE bit is set in the supervision register. |
jeremybennett |
5146d 04h |
/openrisc/ |
| 111 |
Changed conditionals for Verilator to "verilator" instead of "VERILATOR". |
jeremybennett |
5146d 09h |
/openrisc/ |
