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Rev Log message Author Age Path
149 Initial commit of the GCC test suite jeremybennett 5101d 04h /openrisc/
148 The port of newlib for OpenRISC. This version just works with Or1ksim. There is code for a UART based version, but that needs some more work.

This allows GCC to be tested using Or1ksim.		 jeremybennett 5101d 19h /openrisc/
147 Integration of Or1ksim as a GDB simulator. jeremybennett 5101d 20h /openrisc/
146 Restructured Or1k implementation. Now works without frame pointer, using unified code approach. jeremybennett 5101d 20h /openrisc/
145 Fixed bug in data structure initialization. jeremybennett 5101d 20h /openrisc/
144 Missing file to fix bug 1797. jeremybennett 5101d 22h /openrisc/
143 Fix building for Cygwin with GCC 3.4.4 (Bug 1797). Fix breakpoints with instruction cache enabled (Bug 195). jeremybennett 5101d 23h /openrisc/
142 added OpenRISC version rel3 marcus.erlandsson 5102d 02h /openrisc/
141 added OpenRISC version rel3 marcus.erlandsson 5102d 02h /openrisc/
140 Changes to ORPMon, probably broke flash loading, improved TFTP julius 5103d 02h /openrisc/
139 added rel3 info in tags-directory, to avoid misunderstanding marcus.erlandsson 5104d 01h /openrisc/
138 fixed check-in mistake (remove additional directory level) marcus.erlandsson 5104d 01h /openrisc/
137 Release-2 of the OR1200 processor, latest version is always located in trunk-directory marcus.erlandsson 5104d 02h /openrisc/
136 Adding crossbild script, updating MOF install script to use or1ksim-0.4.0 julius 5104d 23h /openrisc/
135 Tagging the 0.4.0 stable release of Or1ksim jeremybennett 5110d 03h /openrisc/
134 Updates for stable release 0.4.0 jeremybennett 5110d 03h /openrisc/
133 Patches for floating point support jeremybennett 5114d 00h /openrisc/
132 This fixes files formatted with DOS line endings (something that should be sorted out outside SVN). jeremybennett 5114d 00h /openrisc/
131 This brings the OpenRISC repository for GDB 6.8 into line with the patched
tool which is distributed. Missing Makefile.in and configure files are added.		 jeremybennett 5114d 00h /openrisc/
130 Updating uclibc patch julius 5115d 03h /openrisc/
129 Previous commit was before saving file. jeremybennett 5115d 23h /openrisc/
128 Tagging the 0.4.0rc2 candidate release of Or1ksim jeremybennett 5115d 23h /openrisc/
127 New config option to allow l.xori with unsigned operand. jeremybennett 5116d 00h /openrisc/
126 More explanation of l.xori. jeremybennett 5116d 00h /openrisc/
125 Update to specification of l.xori. jeremybennett 5116d 07h /openrisc/
124 Overflow handling now in line with architecture manual. Tests added. jeremybennett 5116d 19h /openrisc/
123 Implementation of l.mfspr and l.mtspr corrected to use bitwise OR rather than addition. Associated tests added. jeremybennett 5116d 23h /openrisc/
122 Added l.ror and l.rori with associated tests. jeremybennett 5117d 19h /openrisc/
121 Adds exception handling to l.jalr and l.jr. Adds appropriate tests. jeremybennett 5117d 20h /openrisc/
120 Documents exception generation by l.jalr and l.jr jeremybennett 5117d 20h /openrisc/

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