| Rev |
Log message |
Author |
Age |
Path |
| 258 |
Big OR1200 update - FPU, data cache write-back added, spec updated, ODT format doc now main one, default config set to both caches 8K, all integer arithmetic, FPU off |
julius |
5024d 14h |
/openrisc/ |
| 257 |
Changed or1200 supplementary manual from referring or or1200v2 to be just for the or1200 in general |
julius |
5025d 01h |
/openrisc/ |
| 256 |
Linux patch update - disabled SCET driver by default |
julius |
5025d 20h |
/openrisc/ |
| 255 |
Linux patch update with USB host data cache issue solved, file formatting fixed |
julius |
5027d 22h |
/openrisc/ |
| 254 |
Update of Linux patch with USB driver, rename of its or1ksim config file |
julius |
5028d 15h |
/openrisc/ |
| 253 |
No need to define PROTOTYPES, now DWARF 2 debugging is the default. |
jeremybennett |
5029d 01h |
/openrisc/ |
| 252 |
Changes to use source and line info when DWARF debug data is available. |
jeremybennett |
5029d 02h |
/openrisc/ |
| 251 |
Bug in register enum declaration fixed in or32. Bug with empty arguments to
macro VEC_TA_GTY fixed.
* config/or32/or32.h <enum reg_class>: CR_REGS removed from
enumeration.
* vec.h: All references to VEC_TA_GTY with an empty fourth
argument replaced by VEC_TA_GTY_ANON with only three arguments
<VEC_TA_GTY_ANON>: Created. |
jeremybennett |
5029d 02h |
/openrisc/ |
| 250 |
Specify -DPROTOTYPES to work round problems with K&R style declarations in GDB
testsuite. |
jeremybennett |
5030d 06h |
/openrisc/ |
| 249 |
Corrected handling of double args to dummy calls. Better way of determining frame_id.
* or32-tdep.c (or32_push_dummy_call): Corrected handling of double
args provided in two regs.
(or32_frame_cache): Set frame_id based on SP as it will be, even
it not yet computed. |
jeremybennett |
5030d 06h |
/openrisc/ |
| 248 |
Fixed two bugs in GDB tests.
* gdb.base/break.exp: Test for breakpoint at marker4, output
should be identical whether run with or without prototypes.
* gdb.base/call-sc.exp (test_scalar_returns): When the result of a
return is unknown, the value returned is undefined, not unchanged. |
jeremybennett |
5030d 06h |
/openrisc/ |
| 247 |
Set DWARF2 as the default debugging format. Clear out redundant code from
header.
* config/or32/elf.h <DWARF2_DEBUGGING_INFO>: Defined.
<PREFERRED_DEBUGGING_TYPE>: Changed to DWARF2_DEBUG.
<PUT_SDB_DEF>: Deleted.
* config/or32/or32.h: Obsolete code surrounded by "#if 0" removed
for clarity.
<SDB_DELIM>: Definition deleted.
<DBX_CONTIN_LENGTH, DBX_CONTIN_CHAR, DBX_REGISTER_NUMBER>:
Definition deleted (default suffices).
<DWARF2_UNWIND_INFO, DWARF2_FRAME_INFO>: Defined.
<DWARF2_ASM_LINE_DEBUG_INFO, INCOMIN_RETURN_ADDR_RTX>: Defined.
* config/or32/or32.md: Commenting clarified. Obsolete code for
define_function_unit deleted. |
jeremybennett |
5030d 06h |
/openrisc/ |
| 246 |
ORPmon update - compatiable with new GCC, added new spr-defs file, better tboot reliability |
julius |
5031d 20h |
/openrisc/ |
| 245 |
Fixed minor glitch in build script. Corrected newlib options and added GDB options for simulator script. Updated README to refer to IRC channel. |
jeremybennett |
5035d 04h |
/openrisc/ |
| 244 |
Don't try to skip prologue using SAL info (fails with STABS). Fuller check of prologue. Change register names to rnn from gprnn to match assembler. Add debug option to simulator wrapper.
* or32-tdep.c (or32_register_name): Changed to rnn rather than
gprnn to mach the assembler.
(or32_is_arg_reg, or32_is_callee_saved_reg): Added.
(or32_skip_prologue): Don't use skip_prologue_using_sal. Check for
argument as well as callee saved registers in prologue.
(or32_frame_cache):Check for argument as well as callee saved
registers in prologue.
* wrapper.c: OR32_SIM_DEBUG added to control debug messages.
(sim_close, sim_load, sim_create_inferior, sim_fetch_register)
(sim_stop): Debug statement added.
(sim_read, sim_write): Debug statements now controlled by
OR32_SIM_DEBUG.
(sim_store_register, sim_resume): Debug statement added and
existing debug statements now controlled by OR32_SIM_DEBUG. |
jeremybennett |
5035d 04h |
/openrisc/ |
| 243 |
Fixed libgloss for compiled code with leading underscores removed.
* libgloss/or32/crt0.S (_start): Remove all leading underscores from
references to global C functions and variables (printf, stack,
atexit, _uart_init, main). Modified end of memory detection, so it
works on rentry as well as initial entry. <buserr>: New code to
allow re-entrant _start function. |
jeremybennett |
5035d 04h |
/openrisc/ |
| 242 |
Generate global symbols without leading underscore. Tidy up generation of .proc directive.
* config/or32/elf.h <PUT_SDB_DEF>: Definition removed.
<USER_LABEL_PREFIX>: Modified to match or32.h
* config/or32/linux-elf.h<USER_LABEL_PREFIX>: Modified to match
or32.h
* config/or32/or32.h <LIB_SPEC>: Changed to use free instead of
_free to match change in USER_LABEL_PREFIX.
<USER_LABEL_PREFIX>: Changed from "_" to "".
<ASM_OUTPUT_FUNCTION_PREFIX>: Surround .proc by tab chars.
* config/or32/or32.S (__mulsi3, __udivsi3, __divsi3, __umodsi3)
(__modsi3): Changed from ___mulsi3, ___udivsi3, ___divsi3,
___umodsi3 and ___modsi3 respectively to match change in
USER_LABEL_PREFIX. |
jeremybennett |
5035d 04h |
/openrisc/ |
| 241 |
Ensure register and symbol operands are never confused.
* gas/config/tc-or32.c (parse_operand): New argument to specify that
operand is a register.
(machine_ip): All uses of parse_operand updated to use new argument. |
jeremybennett |
5035d 04h |
/openrisc/ |
| 240 |
or1ksim build fixups for Cygwin copilation |
julius |
5047d 05h |
/openrisc/ |
| 239 |
or1ksim fixed SPR_VR_RESV value |
julius |
5049d 01h |
/openrisc/ |
| 238 |
Added OS X build notes to gnu-src README |
julius |
5050d 00h |
/openrisc/ |
| 237 |
Fixes bug in handling single stepping. |
jeremybennett |
5050d 21h |
/openrisc/ |
| 236 |
Terminate execution on NOP_EXIT, even if debugging, add support for RSP qAttached packet, stall in library after single instruction is ST bit is set in SPR DMR1. Fix softfloat to allow compilation with -O0 for debugging.
* configure: Regenerated.
* configure.ac: Version changed to current date. Test for
varargs.h dropped.
* cpu/or32/insnset.c <l_nop>: Terminate execution on NOP_EXIT,
even if debugging.
* debug/rsp-server.c (rsp_query): Added support for qAttached
packet.
* libtoplevel.c (or1ksim_run): Stall after a single instruction if
SPR_DMR1_ST flag is set.
* softfloat/host.h: Make #define of INLINE conditional, to allow
the user to override.
* softfloat/README: Added instructions for non-optimized compilation.
* softfloat/softfloat-macros: Add a conditional #ifndef
NO_SOFTFLOAT_UNUSUED around unused functions. |
jeremybennett |
5050d 22h |
/openrisc/ |
| 235 |
Removed support for old OpenRISC JTAG Remote Protocol. |
jeremybennett |
5051d 02h |
/openrisc/ |
| 234 |
Minor tidy ups. DOS end of line chars fixed. |
jeremybennett |
5052d 04h |
/openrisc/ |
| 233 |
New softfloat FPU and testfloat sw for or1ksim |
julius |
5052d 15h |
/openrisc/ |
| 232 |
Brought documentation up to date. |
jeremybennett |
5053d 01h |
/openrisc/ |
| 231 |
Japanes translation of the OpenRISC specification by Takashi Okawa. |
jeremybennett |
5053d 06h |
/openrisc/ |
| 230 |
Changed library interface. Fixed namespace problems with instruction lookup in library.
* configure: Regenerated.
* configure.ac: Version changed to current date.
* cpu/or1k/opcode/or32.h <or1ksim_build_automata>: Renamed from
build_automata.
<l_none, num_opcodes, insn_index>: Deleted.
<or1ksim_op_start>: Renamed from op_start.
<or1ksim_automata>: Renamed from automata.
<or1ksim_ti>: Renamed from ti.
<or1ksim_or32_opcodes>: Renamed from or32_opcodes.
<or1ksim_disassembled>: Renamed from disassembled.
<or1ksim_insn_len>: Renamed from insn_len.
<or1ksim_insn_name>: Renamed from insn_name.
<or1ksim_destruct_automata>: Renamed from destruct_automata.
<or1ksim_insn_decode>: Renamed from insn_decode.
<or1ksim_disassemble_insn>: Renamed from disassemble_insn.
<or1ksim_disassemble_index>: Renamed from disassemble_index.
<or1ksim_extend_imm>: Renamed from extend_imm.
<or1ksim_or32_extract>: Renamed from or32_extract
* cpu/or32/or32.c, cpu/or32/execute.c, cpu/or32/generate.c,
* cpu/common/stats.c, cpu/common/abstract.c, cpu/common/parse.c,
* cpu/or1k/opcode/or32.h, cuc/load.c, cuc/cuc.c,
* support/dumpverilog.c, toplevel-support.c: Renaming
corresponding to changes in cpu/or1k/opcode/or32.h.
* cpu/or32/execute-fp.h: Deleted
* cpu/or32/generate.c <include_strings>: Remove reference to
execute-fp.h
* cpu/or32/execute.c <host_fp_rm>: Declared static.
(fp_set_flags_restore_host_rm, fp_set_or1k_rm): Declared static,
forward declaration removed.
* or1ksim.h (or1ksim_read_mem, or1ksim_write_mem): addr arg
changed to unsigned long int.
(or1ksim_read_spr): sprval_ptr arg changed to unsigned long int *.
(or1ksim_write_spr): sprval arg changed to unsigned long int.
(or1ksim_read_reg): regval_ptr arg changed to unsigned long int *.
(or1ksim_write_reg): regval arg changed to unsigned long int.
* libtoplevel.c (or1ksim_read_mem, or1ksim_write_mem): addr arg
changed to unsigned long int.
(or1ksim_read_spr): sprval_ptr arg changed to unsigned long int *.
(or1ksim_write_spr): sprval arg changed to unsigned long int.
(or1ksim_read_reg): regval_ptr arg changed to unsigned long int *.
(or1ksim_write_reg): regval arg changed to unsigned long int. |
jeremybennett |
5053d 20h |
/openrisc/ |
| 229 |
Changes to allow GDB 7.1 tests to run and to remove a couple of $Id$ that were confusing SVN. |
jeremybennett |
5054d 00h |
/openrisc/ |
