Rev |
Log message |
Author |
Age |
Path |
410 |
ORPSoC: Adding README in root explaining how to build documentation, and
documentation fixup so it builds properly again. |
julius |
5020d 19h |
/openrisc/ |
409 |
ORPSoC: Renamed eth core to ethmac (correct name), added drivers for it.
Updated ethernet MAC's instantiation in ORDB1A3PE1500 board build.
Updated documentation. |
julius |
5020d 20h |
/openrisc/ |
408 |
ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too. |
julius |
5021d 08h |
/openrisc/ |
407 |
Update or1ksim version in toolchain script to rc2 |
julius |
5021d 11h |
/openrisc/ |
406 |
ORPmon indented files, bus, align and instruction errors vectors printf and reboot |
julius |
5021d 11h |
/openrisc/ |
405 |
ORPmon updates - ethernet driver updates |
julius |
5021d 16h |
/openrisc/ |
404 |
New scripts to build separate bare metal and Linux tool chains. Fixes to GDB so it builds with the Linux tool chain and uses RELA. Other minor fixes to the GCC tool chain. |
jeremybennett |
5021d 16h |
/openrisc/ |
403 |
ORPSoC big upgrade - intermediate check in. Lots still missing. To come very shortly. |
julius |
5022d 13h |
/openrisc/ |
402 |
Further updates to the compiler |
jeremybennett |
5022d 18h |
/openrisc/ |
401 |
Fixing find first one (ff1) and find last one (fl1) support in OR1200.
Updated documentation, adding missing l.ff1 and l.fl1 opcodes to supported
instructions table. |
julius |
5022d 19h |
/openrisc/ |
400 |
Updates to the linker, GCC, newlib and GDB in preparation for supporting C++. The key changes are that the linker now uses RELA and that GCC may save registers at the bottom of the stack before the frame is allocated or after it is deallocated, so exception handlers/thread primitives should not use the first 130 bytes after the SP. |
jeremybennett |
5022d 19h |
/openrisc/ |
399 |
Updates to the linker, GCC, newlib and GDB in preparation for supporting C++. The key changes are that the linker now uses RELA and that GCC may save registers at the bottom of the stack before the frame is allocated or after it is deallocated, so exception handlers/thread primitives should not use the first 130 bytes after the SP. |
jeremybennett |
5022d 21h |
/openrisc/ |
398 |
ORPSoCv2 removing generic backend path - not needed |
julius |
5023d 20h |
/openrisc/ |
397 |
ORPSoCv2:
doc/ path added, with Texinfo documentation. Still a work in progress.
VPI files updated.
OR1200 l.maci instruction test added. highlighting bug with immediate field for that instruction.
Various cycle accurate model updates. Now uses orpsoc-defines.v (processed C-compat. version) to build. |
julius |
5024d 19h |
/openrisc/ |
396 |
ORPSoCv2 final software fixes...for now. See updated README |
julius |
5027d 18h |
/openrisc/ |
395 |
ORPSoCv2 moving ethernet tests to correct place |
julius |
5027d 18h |
/openrisc/ |
394 |
ORPSoCv2 removing unused directories |
julius |
5027d 18h |
/openrisc/ |
393 |
ORPSoCv2 software rearrangement in progress. Basic tests should now run again. |
julius |
5027d 18h |
/openrisc/ |
392 |
ORPSoCv2 software path reorganisation stage 1. |
julius |
5028d 10h |
/openrisc/ |
391 |
Removing modules no longer needed in ORPSoCv2 |
julius |
5029d 11h |
/openrisc/ |
390 |
Updated toolchain build scripts to use FTP server on OpenCores.org. |
julius |
5029d 11h |
/openrisc/ |
389 |
SD-Card boot added (sdboot) to the commands in the load file. DOS-filesystem added to support Fat12-16. Driver for SD-card added, SD and SDHC supported
Currently hardcoded to boot from vmlinux.bin |
tac2 |
5039d 19h |
/openrisc/ |
388 |
Tagging the 0.5.0rc2 candidate release of Or1ksim |
jeremybennett |
5052d 18h |
/openrisc/ |
387 |
Fixed testing, to always use our DEJAGNU config. |
jeremybennett |
5052d 18h |
/openrisc/ |
386 |
Updated for release 0.5.0rc2 |
jeremybennett |
5052d 18h |
/openrisc/ |
385 |
Updates for Or1ksim 0.5.0rc2.
* configure: Regenerated.
* configure.ac: Minor tidy ups. Version changed to 0.5.0rc2.
* debug/rsp-server.c (rsp_query): Simplified handling of
"qTStatus" to indicate we just do not support tracing.
* doc/or1ksim.texi <Configuring the Build>: No longer mandatory to
specify the target.
<Memory Configuration>: Warns about issues with memory controller.
<Memory Controller Configuration>: Warns about issues with memory
controller and advises not to use it.
<Standalone Simulator>: Details for options with arguments updated.
* NEWS: Updated for 0.5.0rc2.
* peripheral/mc.c (mc_poc): Use constant MC_POC_VALID
(mc_index): Ensure value is valid.
* peripheral/mc-defines.h <MC_CE_VALID>: Defined.
* testsuite/test-code-or1k/configure: Regenerated.
* testsuite/test-code-or1k/configure.ac: Handle the case where
target_cpu is not set. Version changed to 0.5.0rc2.
* testsuite/test-code-or1k/support/spr-defs.h <SPR_VR_RES>:
Definition corrected. |
jeremybennett |
5052d 19h |
/openrisc/ |
384 |
Tagging the 1.0rc2 candidate release of GCC 4.5.1 |
jeremybennett |
5053d 19h |
/openrisc/ |
383 |
Adding makeinfo as a required tool to crossbuild-1.0.sh script |
julius |
5053d 22h |
/openrisc/ |
382 |
New uClibc patch - to be built with 1.0 toolchain |
julius |
5054d 16h |
/openrisc/ |
381 |
Crossbuild script for 1.0 updated to use new GCC rc2 patch and linux-2.6.35 |
julius |
5054d 16h |
/openrisc/ |