| Rev |
Log message |
Author |
Age |
Path |
| 420 |
New feature to trace instructions (option --trace). Manual updated to match. |
jeremybennett |
4976d 12h |
/openrisc/ |
| 419 |
ORPmon: Fixed interrupt routines in reset.S so they are compatible with new
GCC port (skip over redzone).
Added some defines to easily switch what is done when an error vector
is executed.
Added ability to print out EPCR when crashing.
Changed linker script back to one which doesn't skip over holes in SPI
flash memories. |
julius |
4976d 15h |
/openrisc/ |
| 418 |
Or1ksim - adding new option when configuring memories, "exitnops" |
julius |
4976d 15h |
/openrisc/ |
| 417 |
ORPSoC re-adding doc automake files, this time not symlinks |
julius |
4979d 12h |
/openrisc/ |
| 416 |
ORPSoC doc cleanup - removing symlinks from automake'd docs build path |
julius |
4979d 12h |
/openrisc/ |
| 415 |
ORPSoC - ML501 update, working again.
Documentation update including information on ML501 build
OR1200 updates to do with instruction cache tag signal when
invalidate instruction used.
Added ability to define address to pass to SPI flash when
booting.
Added SPI sw test for board which allows inspection of
data in a flash. |
julius |
4979d 12h |
/openrisc/ |
| 414 |
Updates to add -mredzone and improved GCC optimizations. |
jeremybennett |
4980d 07h |
/openrisc/ |
| 413 |
Fixed to combined bug in the assembler and linker. |
jeremybennett |
4981d 10h |
/openrisc/ |
| 412 |
ORPSoC update - Rearranged Xilinx ML501, simulations working again. |
julius |
4983d 02h |
/openrisc/ |
| 411 |
Improved ethmac testbench and software.
Renamed some OR1200 library functions to be more generic.
Fixed bug with versatile_mem_ctrl for Actel board.
Added ability to simulate gatelevel modules alongside RTL modules
in board build. |
julius |
4983d 14h |
/openrisc/ |
| 410 |
ORPSoC: Adding README in root explaining how to build documentation, and
documentation fixup so it builds properly again. |
julius |
4984d 14h |
/openrisc/ |
| 409 |
ORPSoC: Renamed eth core to ethmac (correct name), added drivers for it.
Updated ethernet MAC's instantiation in ORDB1A3PE1500 board build.
Updated documentation. |
julius |
4984d 14h |
/openrisc/ |
| 408 |
ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too. |
julius |
4985d 02h |
/openrisc/ |
| 407 |
Update or1ksim version in toolchain script to rc2 |
julius |
4985d 05h |
/openrisc/ |
| 406 |
ORPmon indented files, bus, align and instruction errors vectors printf and reboot |
julius |
4985d 06h |
/openrisc/ |
| 405 |
ORPmon updates - ethernet driver updates |
julius |
4985d 10h |
/openrisc/ |
| 404 |
New scripts to build separate bare metal and Linux tool chains. Fixes to GDB so it builds with the Linux tool chain and uses RELA. Other minor fixes to the GCC tool chain. |
jeremybennett |
4985d 10h |
/openrisc/ |
| 403 |
ORPSoC big upgrade - intermediate check in. Lots still missing. To come very shortly. |
julius |
4986d 08h |
/openrisc/ |
| 402 |
Further updates to the compiler |
jeremybennett |
4986d 12h |
/openrisc/ |
| 401 |
Fixing find first one (ff1) and find last one (fl1) support in OR1200.
Updated documentation, adding missing l.ff1 and l.fl1 opcodes to supported
instructions table. |
julius |
4986d 13h |
/openrisc/ |
| 400 |
Updates to the linker, GCC, newlib and GDB in preparation for supporting C++. The key changes are that the linker now uses RELA and that GCC may save registers at the bottom of the stack before the frame is allocated or after it is deallocated, so exception handlers/thread primitives should not use the first 130 bytes after the SP. |
jeremybennett |
4986d 13h |
/openrisc/ |
| 399 |
Updates to the linker, GCC, newlib and GDB in preparation for supporting C++. The key changes are that the linker now uses RELA and that GCC may save registers at the bottom of the stack before the frame is allocated or after it is deallocated, so exception handlers/thread primitives should not use the first 130 bytes after the SP. |
jeremybennett |
4986d 15h |
/openrisc/ |
| 398 |
ORPSoCv2 removing generic backend path - not needed |
julius |
4987d 15h |
/openrisc/ |
| 397 |
ORPSoCv2:
doc/ path added, with Texinfo documentation. Still a work in progress.
VPI files updated.
OR1200 l.maci instruction test added. highlighting bug with immediate field for that instruction.
Various cycle accurate model updates. Now uses orpsoc-defines.v (processed C-compat. version) to build. |
julius |
4988d 13h |
/openrisc/ |
| 396 |
ORPSoCv2 final software fixes...for now. See updated README |
julius |
4991d 12h |
/openrisc/ |
| 395 |
ORPSoCv2 moving ethernet tests to correct place |
julius |
4991d 13h |
/openrisc/ |
| 394 |
ORPSoCv2 removing unused directories |
julius |
4991d 13h |
/openrisc/ |
| 393 |
ORPSoCv2 software rearrangement in progress. Basic tests should now run again. |
julius |
4991d 13h |
/openrisc/ |
| 392 |
ORPSoCv2 software path reorganisation stage 1. |
julius |
4992d 05h |
/openrisc/ |
| 391 |
Removing modules no longer needed in ORPSoCv2 |
julius |
4993d 05h |
/openrisc/ |
