| Rev |
Log message |
Author |
Age |
Path |
| 431 |
Updated and move OR1200 supplementary manual.
or_debug_proxy GDB RSP interface fix.
ORPSoC S/W and makefile updates. |
julius |
4940d 18h |
/openrisc/ |
| 430 |
or1ksim - clarifying interrupt behavior in code and documentation. |
julius |
4941d 16h |
/openrisc/ |
| 429 |
or1ksim update - remove debug printfs from eth MDIO emulation function
and fix illegal instruction vector jump for invalid instructions. |
julius |
4941d 19h |
/openrisc/ |
| 428 |
or1ksim - adding preliminary PHY emulation to ethernet peripheral. |
julius |
4944d 15h |
/openrisc/ |
| 427 |
Fixes for C++ to correspond to fixes in uClibc. |
jeremybennett |
4945d 23h |
/openrisc/ |
| 426 |
ORPSoC update
Reverted back to previous OR1200 instruction cache.
(...which...)
Fixed or1200-except test failure on generic model.
ML501 build not passing or1200-except test. Tried disabling
burst on the bus (memory server doesn't support it yet) to
no avail. To be continued... |
julius |
4947d 10h |
/openrisc/ |
| 425 |
ORPSoC update:
GDB servers in VPI and System C model updated to deal with
packets gdb-7.2 sends.
Documentation updated.
Reference design tests can now be run in or1ksim (added rule
to sim/bin/Makefile). or1200-except doesn't appear to work
as illegal instruction error isn't causing jump to vector.
Updated Or1200 tests to report test success value and then
exit with value 0. |
julius |
4947d 11h |
/openrisc/ |
| 424 |
C++ library, needed for C++ compiler. |
jeremybennett |
4947d 21h |
/openrisc/ |
| 423 |
Minor typo fixed. |
jeremybennett |
4948d 00h |
/openrisc/ |
| 422 |
Separates out --force actions, so only build dirs corresponding to targets being built are blown away. |
jeremybennett |
4948d 00h |
/openrisc/ |
| 421 |
Fixing some typos in bld-all.sh's --help printout and changed all
"cd .." lines to "cd -". |
julius |
4950d 22h |
/openrisc/ |
| 420 |
New feature to trace instructions (option --trace). Manual updated to match. |
jeremybennett |
4952d 20h |
/openrisc/ |
| 419 |
ORPmon: Fixed interrupt routines in reset.S so they are compatible with new
GCC port (skip over redzone).
Added some defines to easily switch what is done when an error vector
is executed.
Added ability to print out EPCR when crashing.
Changed linker script back to one which doesn't skip over holes in SPI
flash memories. |
julius |
4952d 23h |
/openrisc/ |
| 418 |
Or1ksim - adding new option when configuring memories, "exitnops" |
julius |
4952d 23h |
/openrisc/ |
| 417 |
ORPSoC re-adding doc automake files, this time not symlinks |
julius |
4955d 19h |
/openrisc/ |
| 416 |
ORPSoC doc cleanup - removing symlinks from automake'd docs build path |
julius |
4955d 19h |
/openrisc/ |
| 415 |
ORPSoC - ML501 update, working again.
Documentation update including information on ML501 build
OR1200 updates to do with instruction cache tag signal when
invalidate instruction used.
Added ability to define address to pass to SPI flash when
booting.
Added SPI sw test for board which allows inspection of
data in a flash. |
julius |
4955d 20h |
/openrisc/ |
| 414 |
Updates to add -mredzone and improved GCC optimizations. |
jeremybennett |
4956d 15h |
/openrisc/ |
| 413 |
Fixed to combined bug in the assembler and linker. |
jeremybennett |
4957d 17h |
/openrisc/ |
| 412 |
ORPSoC update - Rearranged Xilinx ML501, simulations working again. |
julius |
4959d 10h |
/openrisc/ |
| 411 |
Improved ethmac testbench and software.
Renamed some OR1200 library functions to be more generic.
Fixed bug with versatile_mem_ctrl for Actel board.
Added ability to simulate gatelevel modules alongside RTL modules
in board build. |
julius |
4959d 21h |
/openrisc/ |
| 410 |
ORPSoC: Adding README in root explaining how to build documentation, and
documentation fixup so it builds properly again. |
julius |
4960d 21h |
/openrisc/ |
| 409 |
ORPSoC: Renamed eth core to ethmac (correct name), added drivers for it.
Updated ethernet MAC's instantiation in ORDB1A3PE1500 board build.
Updated documentation. |
julius |
4960d 21h |
/openrisc/ |
| 408 |
ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too. |
julius |
4961d 10h |
/openrisc/ |
| 407 |
Update or1ksim version in toolchain script to rc2 |
julius |
4961d 12h |
/openrisc/ |
| 406 |
ORPmon indented files, bus, align and instruction errors vectors printf and reboot |
julius |
4961d 13h |
/openrisc/ |
| 405 |
ORPmon updates - ethernet driver updates |
julius |
4961d 17h |
/openrisc/ |
| 404 |
New scripts to build separate bare metal and Linux tool chains. Fixes to GDB so it builds with the Linux tool chain and uses RELA. Other minor fixes to the GCC tool chain. |
jeremybennett |
4961d 17h |
/openrisc/ |
| 403 |
ORPSoC big upgrade - intermediate check in. Lots still missing. To come very shortly. |
julius |
4962d 15h |
/openrisc/ |
| 402 |
Further updates to the compiler |
jeremybennett |
4962d 20h |
/openrisc/ |
