| Rev |
Log message |
Author |
Age |
Path |
| 435 |
ORPSoC updates
OR1200 multiply/MAC/division unit update with serial multiply and
divide options. Full divide not synthesizable yet.
New software tests of multiply and divide functionality. |
julius |
4950d 15h |
/openrisc/ |
| 434 |
Work in progress with new Ethernet TUN/TAP interface. |
jeremybennett |
4953d 20h |
/openrisc/ |
| 433 |
New single program interrupt test programs. |
jeremybennett |
4954d 23h |
/openrisc/ |
| 432 |
Updates to handle interrupts correctly. |
jeremybennett |
4954d 23h |
/openrisc/ |
| 431 |
Updated and move OR1200 supplementary manual.
or_debug_proxy GDB RSP interface fix.
ORPSoC S/W and makefile updates. |
julius |
4956d 22h |
/openrisc/ |
| 430 |
or1ksim - clarifying interrupt behavior in code and documentation. |
julius |
4957d 20h |
/openrisc/ |
| 429 |
or1ksim update - remove debug printfs from eth MDIO emulation function
and fix illegal instruction vector jump for invalid instructions. |
julius |
4958d 00h |
/openrisc/ |
| 428 |
or1ksim - adding preliminary PHY emulation to ethernet peripheral. |
julius |
4960d 19h |
/openrisc/ |
| 427 |
Fixes for C++ to correspond to fixes in uClibc. |
jeremybennett |
4962d 04h |
/openrisc/ |
| 426 |
ORPSoC update
Reverted back to previous OR1200 instruction cache.
(...which...)
Fixed or1200-except test failure on generic model.
ML501 build not passing or1200-except test. Tried disabling
burst on the bus (memory server doesn't support it yet) to
no avail. To be continued... |
julius |
4963d 14h |
/openrisc/ |
| 425 |
ORPSoC update:
GDB servers in VPI and System C model updated to deal with
packets gdb-7.2 sends.
Documentation updated.
Reference design tests can now be run in or1ksim (added rule
to sim/bin/Makefile). or1200-except doesn't appear to work
as illegal instruction error isn't causing jump to vector.
Updated Or1200 tests to report test success value and then
exit with value 0. |
julius |
4963d 15h |
/openrisc/ |
| 424 |
C++ library, needed for C++ compiler. |
jeremybennett |
4964d 01h |
/openrisc/ |
| 423 |
Minor typo fixed. |
jeremybennett |
4964d 04h |
/openrisc/ |
| 422 |
Separates out --force actions, so only build dirs corresponding to targets being built are blown away. |
jeremybennett |
4964d 04h |
/openrisc/ |
| 421 |
Fixing some typos in bld-all.sh's --help printout and changed all
"cd .." lines to "cd -". |
julius |
4967d 02h |
/openrisc/ |
| 420 |
New feature to trace instructions (option --trace). Manual updated to match. |
jeremybennett |
4969d 00h |
/openrisc/ |
| 419 |
ORPmon: Fixed interrupt routines in reset.S so they are compatible with new
GCC port (skip over redzone).
Added some defines to easily switch what is done when an error vector
is executed.
Added ability to print out EPCR when crashing.
Changed linker script back to one which doesn't skip over holes in SPI
flash memories. |
julius |
4969d 03h |
/openrisc/ |
| 418 |
Or1ksim - adding new option when configuring memories, "exitnops" |
julius |
4969d 03h |
/openrisc/ |
| 417 |
ORPSoC re-adding doc automake files, this time not symlinks |
julius |
4972d 00h |
/openrisc/ |
| 416 |
ORPSoC doc cleanup - removing symlinks from automake'd docs build path |
julius |
4972d 00h |
/openrisc/ |
| 415 |
ORPSoC - ML501 update, working again.
Documentation update including information on ML501 build
OR1200 updates to do with instruction cache tag signal when
invalidate instruction used.
Added ability to define address to pass to SPI flash when
booting.
Added SPI sw test for board which allows inspection of
data in a flash. |
julius |
4972d 00h |
/openrisc/ |
| 414 |
Updates to add -mredzone and improved GCC optimizations. |
jeremybennett |
4972d 19h |
/openrisc/ |
| 413 |
Fixed to combined bug in the assembler and linker. |
jeremybennett |
4973d 22h |
/openrisc/ |
| 412 |
ORPSoC update - Rearranged Xilinx ML501, simulations working again. |
julius |
4975d 14h |
/openrisc/ |
| 411 |
Improved ethmac testbench and software.
Renamed some OR1200 library functions to be more generic.
Fixed bug with versatile_mem_ctrl for Actel board.
Added ability to simulate gatelevel modules alongside RTL modules
in board build. |
julius |
4976d 02h |
/openrisc/ |
| 410 |
ORPSoC: Adding README in root explaining how to build documentation, and
documentation fixup so it builds properly again. |
julius |
4977d 01h |
/openrisc/ |
| 409 |
ORPSoC: Renamed eth core to ethmac (correct name), added drivers for it.
Updated ethernet MAC's instantiation in ORDB1A3PE1500 board build.
Updated documentation. |
julius |
4977d 02h |
/openrisc/ |
| 408 |
ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too. |
julius |
4977d 14h |
/openrisc/ |
| 407 |
Update or1ksim version in toolchain script to rc2 |
julius |
4977d 17h |
/openrisc/ |
| 406 |
ORPmon indented files, bus, align and instruction errors vectors printf and reboot |
julius |
4977d 17h |
/openrisc/ |
