| Rev |
Log message |
Author |
Age |
Path |
| 507 |
Newlib libgloss board support update. Corresponding GCC port changes to support it. |
julius |
4878d 05h |
/openrisc/ |
| 506 |
ORPSoC or1200 interrupt and syscall generation test |
julius |
4879d 04h |
/openrisc/ |
| 505 |
OR1200 overflow detection fixup
SPIflash program update
or1200 driver library timer improvement |
julius |
4879d 05h |
/openrisc/ |
| 504 |
ORPSoC ALU update with new comparison configuration option, software test for comparisons and register file comment cleanup |
julius |
4896d 01h |
/openrisc/ |
| 503 |
ORPSoC's or1200 defines fix to indicate we don't actually have I/DMMU invalidate registers. |
julius |
4896d 21h |
/openrisc/ |
| 502 |
ORPSoC update - or1200, ethmac Xilinx fifos
or1200 in ORPSoC has carry bit, overflow bit, and range exception added and tested. New software tests in ORPSoC library. Ml501 build had ethmac fifos added, and or1200_defines updated to use these new or1200 features by default |
julius |
4899d 01h |
/openrisc/ |
| 501 |
ORPSoC or1200 mult/mac/divide unit serial arith bug fixed.
ORPSoC or1200 defines now use serial divide by default |
julius |
4900d 01h |
/openrisc/ |
| 500 |
ORPSoC's System C UART model can now accept input from stdin during simulation to drive consoles etc
ML501 simulation makefile update to allow custom ELFs to be specified |
julius |
4900d 04h |
/openrisc/ |
| 499 |
ORPSoC OR1200 updates - added l.ext instructions with tests, ammended some MAC bugs, decode stage cleanup |
julius |
4900d 21h |
/openrisc/ |
| 498 |
or_debug_proxy updates to documentation and Makefile related to latest ftd2xx driver, |
julius |
4902d 10h |
/openrisc/ |
| 497 |
or_debug_proxy updates |
julius |
4903d 06h |
/openrisc/ |
| 496 |
ORPSoC ml501 updates - increased frequency, updated documentation |
julius |
4903d 08h |
/openrisc/ |
| 495 |
ORPSoC adding more accessor functions to Micron SDRAM model. |
julius |
4903d 08h |
/openrisc/ |
| 494 |
Change to ensure handles ctrl-C correctly with empty line. |
jeremybennett |
4914d 02h |
/openrisc/ |
| 493 |
ORPSoC VPI JTAG interface, hopefully fix 64-bit machine compile issues. |
julius |
4916d 10h |
/openrisc/ |
| 492 |
ORPSoC VPI interface for modelsim and documentation update |
julius |
4917d 08h |
/openrisc/ |
| 491 |
ORPSoC or1200_monitor update. |
julius |
4917d 19h |
/openrisc/ |
| 490 |
Updates to fix spurious test failures and register scheduling. |
jeremybennett |
4922d 01h |
/openrisc/ |
| 489 |
ORPSoC sw cleanup. Remove warnings. |
julius |
4927d 07h |
/openrisc/ |
| 488 |
ORPSoC OR1200 driver - tick timer exception handler reverted to generic - cpu tick function hook used as default in handler table. OR1200 timer demo sw for board added. |
julius |
4927d 08h |
/openrisc/ |
| 487 |
ORPSoC main software makefile update |
julius |
4930d 06h |
/openrisc/ |
| 486 |
ORPSoC updates, mainly software, i2c driver |
julius |
4930d 06h |
/openrisc/ |
| 485 |
ORPSoC updates - or1200 monitor now has separate defines file, ethmac updates to fifos and wishbone IF, board.h changes for UART (may propegate to other drivers with multiple cores, we'll see), crt0.S for or1200 now zeros all registers on reset, adding own ethernet tests for ML501 |
julius |
4934d 10h |
/openrisc/ |
| 484 |
Changes to make r12 call-saved and to bring wchar tests in line. |
jeremybennett |
4935d 08h |
/openrisc/ |
| 483 |
Updated with new opcodes to generate random numbers and to identify us as Or1ksim. |
jeremybennett |
4937d 10h |
/openrisc/ |
| 482 |
Don't hardcode tool versions in help text |
olof |
4938d 23h |
/openrisc/ |
| 481 |
OR1200 Update. RTL and spec. |
julius |
4950d 17h |
/openrisc/ |
| 480 |
ORPSoC updates - ml501 project cleanups, DDR2 cache bug fixes. |
julius |
4951d 15h |
/openrisc/ |
| 479 |
ORPSoC update to ml501 board port. Memory controller caching fixed up, does multiple lines of cache and Wishbone bursting. |
julius |
4952d 14h |
/openrisc/ |
| 478 |
ORPSoC update - ml501 or1200 cache configuration set to maximum, some cleanups. |
julius |
4954d 06h |
/openrisc/ |
