OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] - Rev 131

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
131 This brings the OpenRISC repository for GDB 6.8 into line with the patched
tool which is distributed. Missing Makefile.in and configure files are added.
jeremybennett 5145d 08h /openrisc/
130 Updating uclibc patch julius 5146d 11h /openrisc/
129 Previous commit was before saving file. jeremybennett 5147d 07h /openrisc/
128 Tagging the 0.4.0rc2 candidate release of Or1ksim jeremybennett 5147d 07h /openrisc/
127 New config option to allow l.xori with unsigned operand. jeremybennett 5147d 08h /openrisc/
126 More explanation of l.xori. jeremybennett 5147d 08h /openrisc/
125 Update to specification of l.xori. jeremybennett 5147d 15h /openrisc/
124 Overflow handling now in line with architecture manual. Tests added. jeremybennett 5148d 03h /openrisc/
123 Implementation of l.mfspr and l.mtspr corrected to use bitwise OR rather than addition. Associated tests added. jeremybennett 5148d 07h /openrisc/
122 Added l.ror and l.rori with associated tests. jeremybennett 5149d 03h /openrisc/
121 Adds exception handling to l.jalr and l.jr. Adds appropriate tests. jeremybennett 5149d 04h /openrisc/
120 Documents exception generation by l.jalr and l.jr jeremybennett 5149d 04h /openrisc/
119 Updated to clarify exceptions for division and details of multiplication. jeremybennett 5149d 16h /openrisc/
118 New tests of multiply. Improved tests of exception handling for addition and division. Improvements to instruction testing library. jeremybennett 5150d 01h /openrisc/
117 Updates on l.ff1, l.fl1 and l.maci. jeremybennett 5152d 04h /openrisc/
116 Updated to fix l.maci and add tests for l.mac, l.maci, l.macrc and l.msb. Fixed bugs in the old Or1ksim mul test at the same time. jeremybennett 5152d 04h /openrisc/
115 Added support for l.fl1 and tests for l.ff1 and l.fl1 jeremybennett 5153d 04h /openrisc/
114 l.addic added. Tests of l.add, l.addc, l.addi and l.addic completed. All set overflow correctly, triggering a range exception if the OVE bit is set in the SR. jeremybennett 5153d 05h /openrisc/
113 Updates to exception handling for l.add and l.div jeremybennett 5154d 04h /openrisc/
112 Tidy ups to Ethernet test fixes. new tests for l.add. Fixes so l.add computes overflow correctly, and generates a range exception if the the OVE bit is set in the supervision register. jeremybennett 5154d 04h /openrisc/
111 Changed conditionals for Verilator to "verilator" instead of "VERILATOR". jeremybennett 5154d 08h /openrisc/
110 or1ksim make check should work without a libc in the or32-elf tools julius 5155d 05h /openrisc/
109 or_debug_proxy does signals with signals, just ignores signals julius 5155d 13h /openrisc/
108 Updated to clarify overflow and exceptions for l.add, l.addc, l.addi, l.addic, l.div and l.divu. jeremybennett 5157d 03h /openrisc/
107 New instruction set testing infrastructure. Fix for l.div/li.divu (Bug 1770) and tests for that bug. jeremybennett 5157d 04h /openrisc/
106 Removing old tests, pending addition of new ones. jeremybennett 5157d 04h /openrisc/
105 Tagging the 0.4.0rc1 candidate release of Or1ksim jeremybennett 5160d 12h /openrisc/
104 Candidate release 0.4.0rc4 jeremybennett 5160d 12h /openrisc/
103 Updated to clarify lf.madd.d and lf.madd.s opcodes. jeremybennett 5161d 08h /openrisc/
102 added linux-2.6.34 and uClibc-0.9.31 patch file marcus.erlandsson 5167d 15h /openrisc/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.