OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] - Rev 193

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
193 Record changes to initfini.c jeremybennett 5149d 04h /openrisc/
192 Updated to fix problems with initfini assembler fragments. jeremybennett 5149d 04h /openrisc/
191 Updated to clarify use of r9 in the l.jalr delay slot. jeremybennett 5149d 04h /openrisc/
190 Allow the Or1ksim installation directory to be set by option. jeremybennett 5149d 10h /openrisc/
189 Fuller explanation of the build script given. jeremybennett 5149d 10h /openrisc/
188 More rigorous testing of options. jeremybennett 5149d 10h /openrisc/
187 Or1200 sprs FPU update julius 5151d 03h /openrisc/
186 OR1200 RTL FPU fix - RF writeback signal working properly again julius 5151d 06h /openrisc/
185 Adding single precision FPU to or1200, initial checkin, not fully tested yet julius 5151d 07h /openrisc/
184 Fix the UART version of newlib. jeremybennett 5152d 11h /openrisc/
183 Fix to setjmp, so it works. Some commenting tidy ups elsewhere. jeremybennett 5153d 03h /openrisc/
182 Removed redundant code. jeremybennett 5153d 03h /openrisc/
181 Updated, so only GCC tries to use parallel build. Redundant target for libgcc removed. jeremybennett 5153d 06h /openrisc/
180 Rewritten to use namespace clean BSP in libgloss. Two versions of the library, one with, one without using the UART. jeremybennett 5153d 06h /openrisc/
179 Code is now loaded from address 0, with section .vectors loaded before any other section. This provides a convenient mechanism for setting up the OR1K exception vectors. jeremybennett 5153d 06h /openrisc/
178 Fixes a bug in prologue recognition without frame pointer. jeremybennett 5153d 06h /openrisc/
177 Specified CPU type for or32, corrected templates for or32-*-elf*. Corrected specs in or32.h, added init and fini. Added support for newlib, including -mor32-newlib and -mor32-newlib-uart options. jeremybennett 5153d 06h /openrisc/
176 Removing empty and redundant directory. jeremybennett 5158d 07h /openrisc/
175 Moved orpmon into bootloaders julius 5158d 08h /openrisc/
174 Consolidating all RTOS ports in one directory. jeremybennett 5158d 09h /openrisc/
173 Consolidating all RTOS ports in one directory. jeremybennett 5158d 09h /openrisc/
172 Information about this directory. jeremybennett 5158d 09h /openrisc/
171 A new directory for ports of real time operating systems. jeremybennett 5158d 09h /openrisc/
170 More detailed instructions. jeremybennett 5158d 09h /openrisc/
169 Script to build entire tool chain and library from unified source tree. jeremybennett 5158d 09h /openrisc/
168 Removing, since all relevant content has been moved to the unified GNU source and patches directories. jeremybennett 5158d 09h /openrisc/
167 Moving to unified patches directory. jeremybennett 5158d 09h /openrisc/
166 Removed. uClibc now obsolete. All other contents moved to unified GNU source and patches trees. jeremybennett 5158d 09h /openrisc/
165 Moving to unified patches directory. jeremybennett 5158d 09h /openrisc/
164 Added to the distribution. Even though compiled, it is part of the GNU standard distributioAdded to the distribution. Even though compiled, it is part of the GNU standard distributionn jeremybennett 5158d 10h /openrisc/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.