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Rev Log message Author Age Path
475 ORPSoC main simulation makefile tidy up, addition of BSS test to cbasic test, addition or o1ksim config files for each board build, modification of BSS symbols in linker script and crt0. julius 4948d 22h /openrisc/
474 uC/OS-II port linker flags updated. julius 4949d 04h /openrisc/
473 Fix typos in tool chain build script. Add build script for BusyBox/uClibc/Linux. Delete obsolete scripts, improve board description for test, add -pthread flag to GCC for Linux. jeremybennett 4949d 22h /openrisc/
472 Various changes which improve the quality of the tracing. jeremybennett 4950d 00h /openrisc/
471 Adding ucos-ii port. julius 4952d 03h /openrisc/
470 ORPSoC OR1200 crt0 updates. julius 4952d 22h /openrisc/
469 newlib update - added zeroing of r0 to crt0.S julius 4953d 23h /openrisc/
468 ORPSoC update:
Added USER_ELF and USER_VMEM options to reference design simulation scripts.
Changed use of absolute BOARD_PATH variable to simply BOARD relative to board path
ML501's board.h bootrom default now boot from SPI
julius 4953d 23h /openrisc/
467 ORPmon - bug fixes and clean up. julius 4954d 21h /openrisc/
466 ORPSoC updates:
Add new test to determine processor's capabilities.
Fix up typo in example in spiflash app README
julius 4955d 02h /openrisc/
465 ORPSoC SPI flash load Makefile and README updates. julius 4955d 17h /openrisc/
464 More ORPmon updates. julius 4955d 17h /openrisc/
463 ORPmon update julius 4955d 20h /openrisc/
462 ORPSoC SystemC wrapper updates, monitor output more similar to or1ksim.

RAM models updated.
julius 4956d 01h /openrisc/
461 Updated to be much stricter about usage. jeremybennett 4957d 21h /openrisc/
460 Merged in changes from Jeremy to Ethernet, updated documentation of tests, added l.nop 8 and l.nop 9 opcodes to turn tracing on and off. Updated documentation to cover l.nop opcodes. jeremybennett 4957d 22h /openrisc/
459 Add option to bld-all.sh to explicitly set control load of make, and fix typos. julius 4958d 04h /openrisc/
458 or1ksim testsuite updates julius 4959d 02h /openrisc/
457 or1ksim - couple of ethernet peripheral updates, fixup of ethernet regression test so all tests pass again. julius 4967d 17h /openrisc/
456 ORPSoCv2 or1200 - SPRs module format and comment update. Or1200 monitor Verilog now displays report and exit l.nops to stdout by default. julius 4967d 18h /openrisc/
455 Updated to support threads. Does require thread debugging enabled in uClibc. jeremybennett 4971d 20h /openrisc/
454 Updated to incorporate pthreads for Linux tool chain. jeremybennett 4973d 22h /openrisc/
453 Updates to support constructor/destructor initialization for uClibc. jeremybennett 4974d 09h /openrisc/
452 Update to define __UCLIBC__ when using the uClibc tool chain. jeremybennett 4974d 17h /openrisc/
451 More tidying up. jeremybennett 4978d 13h /openrisc/
450 Simplified (and hopefully more reliable) Ethernet MAC/PHY. jeremybennett 4978d 16h /openrisc/
449 ORPSoC - or1200_monitor.v additions enabling new experimental execution checks.

Replace use of "clean-all" with "distclean" as make rule to clean things.
julius 4980d 13h /openrisc/
448 Changed or32 to openrisc as Linux architecture name. jeremybennett 4980d 23h /openrisc/
447 Updates to register order. jeremybennett 4981d 17h /openrisc/
446 gdb-7.2 gdbserver updates. julius 4982d 11h /openrisc/

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