OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] - Rev 283

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
283 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5095d 09h /openrisc/trunk/
282 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5095d 09h /openrisc/trunk/
281 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5095d 09h /openrisc/trunk/
280 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5095d 09h /openrisc/trunk/
279 Baseline GCC 4.5.1 port for the OpenRISC 1000. jeremybennett 5095d 09h /openrisc/trunk/
278 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5095d 13h /openrisc/trunk/
277 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5095d 13h /openrisc/trunk/
276 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5095d 13h /openrisc/trunk/
275 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5095d 13h /openrisc/trunk/
274 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5095d 13h /openrisc/trunk/
273 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5095d 13h /openrisc/trunk/
272 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5095d 13h /openrisc/trunk/
271 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5095d 13h /openrisc/trunk/
270 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5095d 13h /openrisc/trunk/
269 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5095d 13h /openrisc/trunk/
268 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5095d 13h /openrisc/trunk/
267 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5095d 13h /openrisc/trunk/
266 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5095d 14h /openrisc/trunk/
265 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5095d 14h /openrisc/trunk/
264 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5095d 14h /openrisc/trunk/
263 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5095d 14h /openrisc/trunk/
262 Baseline port of GCC 4.5.1 for OpenRISC 1000. jeremybennett 5095d 15h /openrisc/trunk/
261 Linux patch update - all ioremap calls now default with cache inhibit julius 5097d 04h /openrisc/trunk/
260 Fixed `define in FPU that didnt need to be there julius 5097d 04h /openrisc/trunk/
259 Fixing or1200_defines FPU module selection defines - They are no longer needed julius 5099d 00h /openrisc/trunk/
258 Big OR1200 update - FPU, data cache write-back added, spec updated, ODT format doc now main one, default config set to both caches 8K, all integer arithmetic, FPU off julius 5099d 00h /openrisc/trunk/
257 Changed or1200 supplementary manual from referring or or1200v2 to be just for the or1200 in general julius 5099d 11h /openrisc/trunk/
256 Linux patch update - disabled SCET driver by default julius 5100d 06h /openrisc/trunk/
255 Linux patch update with USB host data cache issue solved, file formatting fixed julius 5102d 08h /openrisc/trunk/
254 Update of Linux patch with USB driver, rename of its or1ksim config file julius 5103d 00h /openrisc/trunk/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.