OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] - Rev 390

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
390 Updated toolchain build scripts to use FTP server on OpenCores.org. julius 4980d 02h /openrisc/trunk/
389 SD-Card boot added (sdboot) to the commands in the load file. DOS-filesystem added to support Fat12-16. Driver for SD-card added, SD and SDHC supported
Currently hardcoded to boot from vmlinux.bin		 tac2 4990d 10h /openrisc/trunk/
387 Fixed testing, to always use our DEJAGNU config. jeremybennett 5003d 09h /openrisc/trunk/
386 Updated for release 0.5.0rc2 jeremybennett 5003d 10h /openrisc/trunk/
385 Updates for Or1ksim 0.5.0rc2.

* configure: Regenerated.
* configure.ac: Minor tidy ups. Version changed to 0.5.0rc2.
* debug/rsp-server.c (rsp_query): Simplified handling of
"qTStatus" to indicate we just do not support tracing.
* doc/or1ksim.texi <Configuring the Build>: No longer mandatory to
specify the target.
<Memory Configuration>: Warns about issues with memory controller.
<Memory Controller Configuration>: Warns about issues with memory
controller and advises not to use it.
<Standalone Simulator>: Details for options with arguments updated.
* NEWS: Updated for 0.5.0rc2.
* peripheral/mc.c (mc_poc): Use constant MC_POC_VALID
(mc_index): Ensure value is valid.
* peripheral/mc-defines.h <MC_CE_VALID>: Defined.

* testsuite/test-code-or1k/configure: Regenerated.
* testsuite/test-code-or1k/configure.ac: Handle the case where
target_cpu is not set. Version changed to 0.5.0rc2.
* testsuite/test-code-or1k/support/spr-defs.h <SPR_VR_RES>:
Definition corrected.		 jeremybennett 5003d 10h /openrisc/trunk/
383 Adding makeinfo as a required tool to crossbuild-1.0.sh script julius 5004d 13h /openrisc/trunk/
382 New uClibc patch - to be built with 1.0 toolchain julius 5005d 08h /openrisc/trunk/
381 Crossbuild script for 1.0 updated to use new GCC rc2 patch and linux-2.6.35 julius 5005d 08h /openrisc/trunk/
380 Adding new Linux-2.6.35 patch, to be built with new 1.0 toolchain julius 5005d 08h /openrisc/trunk/
379 Linux-2.6.34 patch update - ethernet stability fix and USB host (ohs900) startup device detect improvement julius 5005d 09h /openrisc/trunk/
378 Adding gcc-4.5.1 patches to enable kernel to build again julius 5005d 13h /openrisc/trunk/
377 gcc-4.5.1/gcc/config/or32/or32.c:
Swap INTVAL for REGNO in or32_legitimate_address_p fixing 64-bit
machine build errors.		 julius 5006d 04h /openrisc/trunk/
376 Adding handling cases for RSP queries seen from new gdb-7.2 in RSP servers in
or1ksim and or_debug_proxy.

Adding ChangeLog to or_debug_proxy		 julius 5010d 15h /openrisc/trunk/
375 ORPmon update for compatibility with OR toolchain 1.0rc1 julius 5011d 09h /openrisc/trunk/
374 ORPSoCv2 adding some files forgotten from last checkin julius 5011d 09h /openrisc/trunk/
373 ORPSoCv2 software update for compatibility with OR toolchain 1.0 julius 5011d 09h /openrisc/trunk/
372 Toolchain install script uClibc variable update julius 5011d 12h /openrisc/trunk/
371 Toolchain install script binutils commented out fix julius 5011d 12h /openrisc/trunk/
370 Toolchain install script uclibc url fix julius 5011d 12h /openrisc/trunk/
369 Toolchain build script binutils path fix julius 5011d 13h /openrisc/trunk/
368 Toolchain script: adding sim url path julius 5011d 13h /openrisc/trunk/
367 Fixup 1.0 release script julius 5011d 13h /openrisc/trunk/
366 Version 1.0 toolchain script commit julius 5011d 13h /openrisc/trunk/
365 Linux-2.6.34 patch update with updated USB ohs900 host julius 5014d 07h /openrisc/trunk/
364 OR1200 passes verilator lint. Mainly fixes to widths, and all case statements
altered to casez and Xs changed to ?s.

OR1200 PIC default width back to 31 (was accidentally changed to ORPSoC's 20
last checkin)

OR1200 spec updated to version 0.9, various updates.

OR1200 in ORPSoC and main OR1200 in sync, only difference is defines.		 julius 5023d 06h /openrisc/trunk/
363 ORPSoC's RTL code fixed to pass linting by Verilator.

ORPSoC's debug interface disabled for now in both RTL and System C top level.

Profiled building of cycle-accurate model now done correctly.		 julius 5023d 16h /openrisc/trunk/
362 ORPSoCv2 verilator building working again. Board build fixes to follow julius 5025d 01h /openrisc/trunk/
361 OPRSoCv2 - adding things left out in last check-in julius 5025d 06h /openrisc/trunk/
360 First checkin of new ORPSoC set up - more to come, all but RTL tests temporarily broken julius 5025d 06h /openrisc/trunk/
359 Removing duplicate OR1200 spec from docs/ path, original in or1200/doc should be used instead, also moving Japanese OR1200 spec to or1200/doc julius 5025d 13h /openrisc/trunk/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.