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Rev Log message Author Age Path
518 Missing parts of checkin from revision 515. Version now 1.0rc4. julius 4816d 23h /openrisc/trunk/
517 newlib updates with or1k support functions, libgloss cleanup julius 4817d 17h /openrisc/trunk/
515 Minor synch with recent changes by Joern. jeremybennett 4818d 00h /openrisc/trunk/
514 Changes for version 1.0rc3 for OpenRISC 1000. Various bugs and tests fixed. jeremybennett 4818d 02h /openrisc/trunk/
512 Updates for release 1.0rc3 for the OpenRISC 1000. jeremybennett 4818d 05h /openrisc/trunk/
510 Updates for release 0.5.1rc1. jeremybennett 4819d 05h /openrisc/trunk/
508 Updates for Or1ksim 0.5.0rc3. jeremybennett 4820d 04h /openrisc/trunk/
507 Newlib libgloss board support update. Corresponding GCC port changes to support it. julius 4826d 01h /openrisc/trunk/
506 ORPSoC or1200 interrupt and syscall generation test julius 4827d 00h /openrisc/trunk/
505 OR1200 overflow detection fixup

SPIflash program update

or1200 driver library timer improvement
julius 4827d 01h /openrisc/trunk/
504 ORPSoC ALU update with new comparison configuration option, software test for comparisons and register file comment cleanup julius 4843d 21h /openrisc/trunk/
503 ORPSoC's or1200 defines fix to indicate we don't actually have I/DMMU invalidate registers. julius 4844d 17h /openrisc/trunk/
502 ORPSoC update - or1200, ethmac Xilinx fifos
or1200 in ORPSoC has carry bit, overflow bit, and range exception added and tested. New software tests in ORPSoC library. Ml501 build had ethmac fifos added, and or1200_defines updated to use these new or1200 features by default
julius 4846d 21h /openrisc/trunk/
501 ORPSoC or1200 mult/mac/divide unit serial arith bug fixed.
ORPSoC or1200 defines now use serial divide by default
julius 4847d 21h /openrisc/trunk/
500 ORPSoC's System C UART model can now accept input from stdin during simulation to drive consoles etc

ML501 simulation makefile update to allow custom ELFs to be specified
julius 4848d 00h /openrisc/trunk/
499 ORPSoC OR1200 updates - added l.ext instructions with tests, ammended some MAC bugs, decode stage cleanup julius 4848d 17h /openrisc/trunk/
498 or_debug_proxy updates to documentation and Makefile related to latest ftd2xx driver, julius 4850d 06h /openrisc/trunk/
497 or_debug_proxy updates julius 4851d 02h /openrisc/trunk/
496 ORPSoC ml501 updates - increased frequency, updated documentation julius 4851d 04h /openrisc/trunk/
495 ORPSoC adding more accessor functions to Micron SDRAM model. julius 4851d 04h /openrisc/trunk/
494 Change to ensure handles ctrl-C correctly with empty line. jeremybennett 4861d 21h /openrisc/trunk/
493 ORPSoC VPI JTAG interface, hopefully fix 64-bit machine compile issues. julius 4864d 06h /openrisc/trunk/
492 ORPSoC VPI interface for modelsim and documentation update julius 4865d 04h /openrisc/trunk/
491 ORPSoC or1200_monitor update. julius 4865d 15h /openrisc/trunk/
490 Updates to fix spurious test failures and register scheduling. jeremybennett 4869d 20h /openrisc/trunk/
489 ORPSoC sw cleanup. Remove warnings. julius 4875d 03h /openrisc/trunk/
488 ORPSoC OR1200 driver - tick timer exception handler reverted to generic - cpu tick function hook used as default in handler table. OR1200 timer demo sw for board added. julius 4875d 04h /openrisc/trunk/
487 ORPSoC main software makefile update julius 4878d 01h /openrisc/trunk/
486 ORPSoC updates, mainly software, i2c driver julius 4878d 01h /openrisc/trunk/
485 ORPSoC updates - or1200 monitor now has separate defines file, ethmac updates to fifos and wishbone IF, board.h changes for UART (may propegate to other drivers with multiple cores, we'll see), crt0.S for or1200 now zeros all registers on reset, adding own ethernet tests for ML501 julius 4882d 06h /openrisc/trunk/

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