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Rev Log message Author Age Path
57 ORPSoC execution logs created by event sim and cycle accurate should now be equivalent. Changed some of the rule names in orpsoc main makefile to make all rules use hyphens instead of underscores between words julius 5318d 21h /openrisc/trunk/
56 adding generic pll model to orpsoc julius 5327d 00h /openrisc/trunk/
55 Added modelsim support to makefile. Moved buffer libraries to sensible place. Removed a lot of junk julius 5329d 14h /openrisc/trunk/
54 wb_conbus wishbone arbiter now in orpsocv2 instead of synthesized netlist julius 5339d 21h /openrisc/trunk/
53 Fixed incorrect commandline option for ORPSoC and main makefile setting julius 5357d 22h /openrisc/trunk/
52 ORPSoC update - ability to dump part or all of SRAM contents at the end of simulation julius 5358d 18h /openrisc/trunk/
51 ORPSoCv2 updates: cycle accurate profiling, ELF loading julius 5372d 20h /openrisc/trunk/
50 Adding or32_funcs.S julius 5373d 00h /openrisc/trunk/
49 Lots of ORPSoC Updates. Cycle accurate model update. Enabled block read from CPU via debug interface. SMII interface same as devboard but may be broken in sim now. Makefile update julius 5391d 14h /openrisc/trunk/
48 Adds an initialization to keep GCC happy in jp1_ll_read_jp1. jeremybennett 5391d 17h /openrisc/trunk/
47 debug proxy speed increase, block transfers possible with cpu aslong as dbg_interface has appropriate change, usb chip reinit function, changed some of the retry code in the usb transfer functions julius 5401d 01h /openrisc/trunk/
46 debug interfaces now support byte and non-aligned accesses from gdb julius 5407d 01h /openrisc/trunk/
45 Orpsoc eth test fix and script error message update julius 5414d 01h /openrisc/trunk/
44 New SystemC model monitoring functions, ethernet PHY model and test sw, smii decoder for ethernet PHY, various makefile upgrades julius 5443d 00h /openrisc/trunk/
43 Couple of fixes to ORPSoC, new linux patch version in toolchain script julius 5466d 21h /openrisc/trunk/
42 Fixed ORPSoCv2 VCD dumping and UART output in cycleaccurate model julius 5482d 18h /openrisc/trunk/
41 Update to or1k top julius 5485d 20h /openrisc/trunk/
40 Added GDB server to verilog simulation via VPI and make target to build and run this model julius 5487d 01h /openrisc/trunk/
39 Adding OR debug proxy a makefile tweak for uClibc and toolchain install script update julius 5491d 01h /openrisc/trunk/
38 Adding binutils, gcc, uClibc patched source and patches julius 5501d 01h /openrisc/trunk/
37 Update to the toolchain script - uses gcc-core package now instead of complete gcc julius 5501d 01h /openrisc/trunk/
36 Better clean rule in makefile julius 5501d 01h /openrisc/trunk/
35 Download and patch files with README files updated to explain what is in the new repository jeremybennett 5501d 19h /openrisc/trunk/
34 Created directories for download and patch files and added README's explaining what is in each one. jeremybennett 5501d 19h /openrisc/trunk/
30 copied rtems from or1k repo unneback 5501d 21h /openrisc/trunk/
29 unneback 5501d 22h /openrisc/trunk/
28 unneback 5501d 22h /openrisc/trunk/
27 unneback 5501d 22h /openrisc/trunk/
26 unneback 5501d 23h /openrisc/trunk/
25 copied eCos from or1k repo unneback 5502d 00h /openrisc/trunk/

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