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Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] - Rev 468

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Rev Log message Author Age Path
468 ORPSoC update:
Added USER_ELF and USER_VMEM options to reference design simulation scripts.
Changed use of absolute BOARD_PATH variable to simply BOARD relative to board path
ML501's board.h bootrom default now boot from SPI		 julius 4921d 17h /openrisc/trunk/
467 ORPmon - bug fixes and clean up. julius 4922d 14h /openrisc/trunk/
466 ORPSoC updates:
Add new test to determine processor's capabilities.
Fix up typo in example in spiflash app README		 julius 4922d 20h /openrisc/trunk/
465 ORPSoC SPI flash load Makefile and README updates. julius 4923d 10h /openrisc/trunk/
464 More ORPmon updates. julius 4923d 11h /openrisc/trunk/
463 ORPmon update julius 4923d 14h /openrisc/trunk/
462 ORPSoC SystemC wrapper updates, monitor output more similar to or1ksim.

RAM models updated.		 julius 4923d 19h /openrisc/trunk/
461 Updated to be much stricter about usage. jeremybennett 4925d 14h /openrisc/trunk/
460 Merged in changes from Jeremy to Ethernet, updated documentation of tests, added l.nop 8 and l.nop 9 opcodes to turn tracing on and off. Updated documentation to cover l.nop opcodes. jeremybennett 4925d 16h /openrisc/trunk/
459 Add option to bld-all.sh to explicitly set control load of make, and fix typos. julius 4925d 22h /openrisc/trunk/
458 or1ksim testsuite updates julius 4926d 20h /openrisc/trunk/
457 or1ksim - couple of ethernet peripheral updates, fixup of ethernet regression test so all tests pass again. julius 4935d 10h /openrisc/trunk/
456 ORPSoCv2 or1200 - SPRs module format and comment update. Or1200 monitor Verilog now displays report and exit l.nops to stdout by default. julius 4935d 11h /openrisc/trunk/
455 Updated to support threads. Does require thread debugging enabled in uClibc. jeremybennett 4939d 13h /openrisc/trunk/
454 Updated to incorporate pthreads for Linux tool chain. jeremybennett 4941d 15h /openrisc/trunk/
453 Updates to support constructor/destructor initialization for uClibc. jeremybennett 4942d 02h /openrisc/trunk/
452 Update to define __UCLIBC__ when using the uClibc tool chain. jeremybennett 4942d 10h /openrisc/trunk/
451 More tidying up. jeremybennett 4946d 06h /openrisc/trunk/
450 Simplified (and hopefully more reliable) Ethernet MAC/PHY. jeremybennett 4946d 10h /openrisc/trunk/
449 ORPSoC - or1200_monitor.v additions enabling new experimental execution checks.

Replace use of "clean-all" with "distclean" as make rule to clean things.		 julius 4948d 07h /openrisc/trunk/
448 Changed or32 to openrisc as Linux architecture name. jeremybennett 4948d 17h /openrisc/trunk/
447 Updates to register order. jeremybennett 4949d 10h /openrisc/trunk/
446 gdb-7.2 gdbserver updates. julius 4950d 05h /openrisc/trunk/
445 gdbserver update to use kernel port ptrace register definitions. julius 4951d 02h /openrisc/trunk/
444 Changes to ABI handling of varargs. jeremybennett 4951d 11h /openrisc/trunk/
443 Work in progress on more efficient Ethernet. jeremybennett 4951d 14h /openrisc/trunk/
442 OR1Ksim - adding trace controlability by SIGUSR1 signal. julius 4952d 05h /openrisc/trunk/
441 Changes for gdbserver. jeremybennett 4952d 11h /openrisc/trunk/
440 Updated documentation to describe new Ethernet usage. jeremybennett 4953d 06h /openrisc/trunk/
439 ORPSoC update

Ethernet MAC synthesis issues with Actel Synplify D-2009.12A
Ethernet MAC FIFO synthesis issues with Xilinx XST

Multiply/divide tests for to run on target.

Added third interface to ram_wb module, changed reference design RAM to ram_wb
wrapper. Updated verilog and system C monitor modules accordingly.

Added ability to use ram_wb as internal memory on ML501 design.

Fixed ethernet MAC tests for ML501.		 julius 4955d 10h /openrisc/trunk/

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