Rev |
Log message |
Author |
Age |
Path |
512 |
Updates for release 1.0rc3 for the OpenRISC 1000. |
jeremybennett |
4863d 22h |
/openrisc/trunk/ |
510 |
Updates for release 0.5.1rc1. |
jeremybennett |
4864d 21h |
/openrisc/trunk/ |
508 |
Updates for Or1ksim 0.5.0rc3. |
jeremybennett |
4865d 21h |
/openrisc/trunk/ |
507 |
Newlib libgloss board support update. Corresponding GCC port changes to support it. |
julius |
4871d 18h |
/openrisc/trunk/ |
506 |
ORPSoC or1200 interrupt and syscall generation test |
julius |
4872d 17h |
/openrisc/trunk/ |
505 |
OR1200 overflow detection fixup
SPIflash program update
or1200 driver library timer improvement |
julius |
4872d 17h |
/openrisc/trunk/ |
504 |
ORPSoC ALU update with new comparison configuration option, software test for comparisons and register file comment cleanup |
julius |
4889d 13h |
/openrisc/trunk/ |
503 |
ORPSoC's or1200 defines fix to indicate we don't actually have I/DMMU invalidate registers. |
julius |
4890d 09h |
/openrisc/trunk/ |
502 |
ORPSoC update - or1200, ethmac Xilinx fifos
or1200 in ORPSoC has carry bit, overflow bit, and range exception added and tested. New software tests in ORPSoC library. Ml501 build had ethmac fifos added, and or1200_defines updated to use these new or1200 features by default |
julius |
4892d 13h |
/openrisc/trunk/ |
501 |
ORPSoC or1200 mult/mac/divide unit serial arith bug fixed.
ORPSoC or1200 defines now use serial divide by default |
julius |
4893d 14h |
/openrisc/trunk/ |
500 |
ORPSoC's System C UART model can now accept input from stdin during simulation to drive consoles etc
ML501 simulation makefile update to allow custom ELFs to be specified |
julius |
4893d 17h |
/openrisc/trunk/ |
499 |
ORPSoC OR1200 updates - added l.ext instructions with tests, ammended some MAC bugs, decode stage cleanup |
julius |
4894d 10h |
/openrisc/trunk/ |
498 |
or_debug_proxy updates to documentation and Makefile related to latest ftd2xx driver, |
julius |
4895d 23h |
/openrisc/trunk/ |
497 |
or_debug_proxy updates |
julius |
4896d 19h |
/openrisc/trunk/ |
496 |
ORPSoC ml501 updates - increased frequency, updated documentation |
julius |
4896d 20h |
/openrisc/trunk/ |
495 |
ORPSoC adding more accessor functions to Micron SDRAM model. |
julius |
4896d 20h |
/openrisc/trunk/ |
494 |
Change to ensure handles ctrl-C correctly with empty line. |
jeremybennett |
4907d 14h |
/openrisc/trunk/ |
493 |
ORPSoC VPI JTAG interface, hopefully fix 64-bit machine compile issues. |
julius |
4909d 22h |
/openrisc/trunk/ |
492 |
ORPSoC VPI interface for modelsim and documentation update |
julius |
4910d 20h |
/openrisc/trunk/ |
491 |
ORPSoC or1200_monitor update. |
julius |
4911d 07h |
/openrisc/trunk/ |
490 |
Updates to fix spurious test failures and register scheduling. |
jeremybennett |
4915d 13h |
/openrisc/trunk/ |
489 |
ORPSoC sw cleanup. Remove warnings. |
julius |
4920d 20h |
/openrisc/trunk/ |
488 |
ORPSoC OR1200 driver - tick timer exception handler reverted to generic - cpu tick function hook used as default in handler table. OR1200 timer demo sw for board added. |
julius |
4920d 20h |
/openrisc/trunk/ |
487 |
ORPSoC main software makefile update |
julius |
4923d 18h |
/openrisc/trunk/ |
486 |
ORPSoC updates, mainly software, i2c driver |
julius |
4923d 18h |
/openrisc/trunk/ |
485 |
ORPSoC updates - or1200 monitor now has separate defines file, ethmac updates to fifos and wishbone IF, board.h changes for UART (may propegate to other drivers with multiple cores, we'll see), crt0.S for or1200 now zeros all registers on reset, adding own ethernet tests for ML501 |
julius |
4927d 23h |
/openrisc/trunk/ |
484 |
Changes to make r12 call-saved and to bring wchar tests in line. |
jeremybennett |
4928d 21h |
/openrisc/trunk/ |
483 |
Updated with new opcodes to generate random numbers and to identify us as Or1ksim. |
jeremybennett |
4930d 23h |
/openrisc/trunk/ |
482 |
Don't hardcode tool versions in help text |
olof |
4932d 11h |
/openrisc/trunk/ |
481 |
OR1200 Update. RTL and spec. |
julius |
4944d 05h |
/openrisc/trunk/ |