OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] - Rev 463

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
463 ORPmon update julius 4931d 18h /openrisc/trunk/
462 ORPSoC SystemC wrapper updates, monitor output more similar to or1ksim.

RAM models updated.		 julius 4931d 23h /openrisc/trunk/
461 Updated to be much stricter about usage. jeremybennett 4933d 18h /openrisc/trunk/
460 Merged in changes from Jeremy to Ethernet, updated documentation of tests, added l.nop 8 and l.nop 9 opcodes to turn tracing on and off. Updated documentation to cover l.nop opcodes. jeremybennett 4933d 20h /openrisc/trunk/
459 Add option to bld-all.sh to explicitly set control load of make, and fix typos. julius 4934d 02h /openrisc/trunk/
458 or1ksim testsuite updates julius 4935d 00h /openrisc/trunk/
457 or1ksim - couple of ethernet peripheral updates, fixup of ethernet regression test so all tests pass again. julius 4943d 14h /openrisc/trunk/
456 ORPSoCv2 or1200 - SPRs module format and comment update. Or1200 monitor Verilog now displays report and exit l.nops to stdout by default. julius 4943d 16h /openrisc/trunk/
455 Updated to support threads. Does require thread debugging enabled in uClibc. jeremybennett 4947d 18h /openrisc/trunk/
454 Updated to incorporate pthreads for Linux tool chain. jeremybennett 4949d 19h /openrisc/trunk/
453 Updates to support constructor/destructor initialization for uClibc. jeremybennett 4950d 06h /openrisc/trunk/
452 Update to define __UCLIBC__ when using the uClibc tool chain. jeremybennett 4950d 14h /openrisc/trunk/
451 More tidying up. jeremybennett 4954d 10h /openrisc/trunk/
450 Simplified (and hopefully more reliable) Ethernet MAC/PHY. jeremybennett 4954d 14h /openrisc/trunk/
449 ORPSoC - or1200_monitor.v additions enabling new experimental execution checks.

Replace use of "clean-all" with "distclean" as make rule to clean things.		 julius 4956d 11h /openrisc/trunk/
448 Changed or32 to openrisc as Linux architecture name. jeremybennett 4956d 21h /openrisc/trunk/
447 Updates to register order. jeremybennett 4957d 15h /openrisc/trunk/
446 gdb-7.2 gdbserver updates. julius 4958d 09h /openrisc/trunk/
445 gdbserver update to use kernel port ptrace register definitions. julius 4959d 06h /openrisc/trunk/
444 Changes to ABI handling of varargs. jeremybennett 4959d 15h /openrisc/trunk/
443 Work in progress on more efficient Ethernet. jeremybennett 4959d 19h /openrisc/trunk/
442 OR1Ksim - adding trace controlability by SIGUSR1 signal. julius 4960d 09h /openrisc/trunk/
441 Changes for gdbserver. jeremybennett 4960d 15h /openrisc/trunk/
440 Updated documentation to describe new Ethernet usage. jeremybennett 4961d 10h /openrisc/trunk/
439 ORPSoC update

Ethernet MAC synthesis issues with Actel Synplify D-2009.12A
Ethernet MAC FIFO synthesis issues with Xilinx XST

Multiply/divide tests for to run on target.

Added third interface to ram_wb module, changed reference design RAM to ram_wb
wrapper. Updated verilog and system C monitor modules accordingly.

Added ability to use ram_wb as internal memory on ML501 design.

Fixed ethernet MAC tests for ML501.		 julius 4963d 14h /openrisc/trunk/
438 Fix to newlib header and library locations. jeremybennett 4966d 15h /openrisc/trunk/
437 Or1ksim - ethernet peripheral update, working much better. julius 4969d 05h /openrisc/trunk/
436 Or1ksim ethernet TAP updates. Ethernet test still failing. julius 4970d 05h /openrisc/trunk/
435 ORPSoC updates
OR1200 multiply/MAC/division unit update with serial multiply and
divide options. Full divide not synthesizable yet.
New software tests of multiply and divide functionality.		 julius 4970d 06h /openrisc/trunk/
434 Work in progress with new Ethernet TUN/TAP interface. jeremybennett 4973d 11h /openrisc/trunk/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.