OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] [peripheral/] - Rev 257

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
240 or1ksim build fixups for Cygwin copilation julius 5067d 05h /openrisc/trunk/or1ksim/peripheral/
236 Terminate execution on NOP_EXIT, even if debugging, add support for RSP qAttached packet, stall in library after single instruction is ST bit is set in SPR DMR1. Fix softfloat to allow compilation with -O0 for debugging.

* configure: Regenerated.
* configure.ac: Version changed to current date. Test for
varargs.h dropped.
* cpu/or32/insnset.c <l_nop>: Terminate execution on NOP_EXIT,
even if debugging.
* debug/rsp-server.c (rsp_query): Added support for qAttached
packet.
* libtoplevel.c (or1ksim_run): Stall after a single instruction if
SPR_DMR1_ST flag is set.
* softfloat/host.h: Make #define of INLINE conditional, to allow
the user to override.
* softfloat/README: Added instructions for non-optimized compilation.
* softfloat/softfloat-macros: Add a conditional #ifndef
NO_SOFTFLOAT_UNUSUED around unused functions.
jeremybennett 5070d 22h /openrisc/trunk/or1ksim/peripheral/
235 Removed support for old OpenRISC JTAG Remote Protocol. jeremybennett 5071d 02h /openrisc/trunk/or1ksim/peripheral/
234 Minor tidy ups. DOS end of line chars fixed. jeremybennett 5072d 04h /openrisc/trunk/or1ksim/peripheral/
233 New softfloat FPU and testfloat sw for or1ksim julius 5072d 15h /openrisc/trunk/or1ksim/peripheral/
230 Changed library interface. Fixed namespace problems with instruction lookup in library.

* configure: Regenerated.
* configure.ac: Version changed to current date.
* cpu/or1k/opcode/or32.h <or1ksim_build_automata>: Renamed from
build_automata.
<l_none, num_opcodes, insn_index>: Deleted.
<or1ksim_op_start>: Renamed from op_start.
<or1ksim_automata>: Renamed from automata.
<or1ksim_ti>: Renamed from ti.
<or1ksim_or32_opcodes>: Renamed from or32_opcodes.
<or1ksim_disassembled>: Renamed from disassembled.
<or1ksim_insn_len>: Renamed from insn_len.
<or1ksim_insn_name>: Renamed from insn_name.
<or1ksim_destruct_automata>: Renamed from destruct_automata.
<or1ksim_insn_decode>: Renamed from insn_decode.
<or1ksim_disassemble_insn>: Renamed from disassemble_insn.
<or1ksim_disassemble_index>: Renamed from disassemble_index.
<or1ksim_extend_imm>: Renamed from extend_imm.
<or1ksim_or32_extract>: Renamed from or32_extract
* cpu/or32/or32.c, cpu/or32/execute.c, cpu/or32/generate.c,
* cpu/common/stats.c, cpu/common/abstract.c, cpu/common/parse.c,
* cpu/or1k/opcode/or32.h, cuc/load.c, cuc/cuc.c,
* support/dumpverilog.c, toplevel-support.c: Renaming
corresponding to changes in cpu/or1k/opcode/or32.h.
* cpu/or32/execute-fp.h: Deleted
* cpu/or32/generate.c <include_strings>: Remove reference to
execute-fp.h
* cpu/or32/execute.c <host_fp_rm>: Declared static.
(fp_set_flags_restore_host_rm, fp_set_or1k_rm): Declared static,
forward declaration removed.
* or1ksim.h (or1ksim_read_mem, or1ksim_write_mem): addr arg
changed to unsigned long int.
(or1ksim_read_spr): sprval_ptr arg changed to unsigned long int *.
(or1ksim_write_spr): sprval arg changed to unsigned long int.
(or1ksim_read_reg): regval_ptr arg changed to unsigned long int *.
(or1ksim_write_reg): regval arg changed to unsigned long int.
* libtoplevel.c (or1ksim_read_mem, or1ksim_write_mem): addr arg
changed to unsigned long int.
(or1ksim_read_spr): sprval_ptr arg changed to unsigned long int *.
(or1ksim_write_spr): sprval arg changed to unsigned long int.
(or1ksim_read_reg): regval_ptr arg changed to unsigned long int *.
(or1ksim_write_reg): regval arg changed to unsigned long int.
jeremybennett 5073d 20h /openrisc/trunk/or1ksim/peripheral/
226 Orksim floating point support additions, spr-defs.h updates, newlib cache init routines updated julius 5075d 20h /openrisc/trunk/or1ksim/peripheral/
224 Add new library functions and modify existing ones. Change the parameter type enumarations to upper case. New (simplified and corrected) config file parsing. No include files or default sim.cfg. jeremybennett 5076d 03h /openrisc/trunk/or1ksim/peripheral/
121 Adds exception handling to l.jalr and l.jr. Adds appropriate tests. jeremybennett 5121d 20h /openrisc/trunk/or1ksim/peripheral/
118 New tests of multiply. Improved tests of exception handling for addition and division. Improvements to instruction testing library. jeremybennett 5122d 17h /openrisc/trunk/or1ksim/peripheral/
112 Tidy ups to Ethernet test fixes. new tests for l.add. Fixes so l.add computes overflow correctly, and generates a range exception if the the OVE bit is set in the supervision register. jeremybennett 5126d 20h /openrisc/trunk/or1ksim/peripheral/
110 or1ksim make check should work without a libc in the or32-elf tools julius 5127d 21h /openrisc/trunk/or1ksim/peripheral/
104 Candidate release 0.4.0rc4 jeremybennett 5133d 04h /openrisc/trunk/or1ksim/peripheral/
101 ChangeLog updated for floating point support. Fixed bug in generic peripheral upcalls. Upped release date in configure.ac. Removed redundant debugging print in abstract.c jeremybennett 5141d 22h /openrisc/trunk/or1ksim/peripheral/
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5147d 23h /openrisc/trunk/or1ksim/peripheral/
97 Updates to test the new JTAG library interface (not yet complete). jeremybennett 5162d 05h /openrisc/trunk/or1ksim/peripheral/
96 Various changes which had not been picked up in earlier commits. jeremybennett 5163d 06h /openrisc/trunk/or1ksim/peripheral/
93 Additional library tests. Key difference is change to Or1ksim library interface for upcalls to bring closer in to line with SystemC TLM 2.0. jeremybennett 5168d 21h /openrisc/trunk/or1ksim/peripheral/
91 Tidy up of some obsolete configuration code. jeremybennett 5175d 19h /openrisc/trunk/or1ksim/peripheral/
90 Reorganized to allow tests with both native code (for the library) and OpenRISC code (which requires the target tool chain). jeremybennett 5175d 21h /openrisc/trunk/or1ksim/peripheral/
87 Typo fixed. jeremybennett 5176d 04h /openrisc/trunk/or1ksim/peripheral/
86 Bug 1723 fixed (PS2 keyboard error message clarification). jeremybennett 5176d 04h /openrisc/trunk/or1ksim/peripheral/
82 Major restructuring of the testbench, now named testsuite to bring it into the main package with its own configuration. Uses DejaGNU and builds using a standard top level "make check".

Incorporate Mark Jarvis's fixes for Mac OS X.
jeremybennett 5176d 20h /openrisc/trunk/or1ksim/peripheral/
80 Add missing configuration files to SVN. jeremybennett 5176d 23h /openrisc/trunk/or1ksim/peripheral/
60 Mark Jarvin's patches to support Mac OS X (Snow Leopard). jeremybennett 5294d 22h /openrisc/trunk/or1ksim/peripheral/
19 Initial commit of Or1ksim 0.3.0 into the new repository jeremybennett 5507d 05h /openrisc/trunk/or1ksim/peripheral/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.