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[/] [openrisc/] [trunk/] [orpsocv2/] - Rev 534

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Rev Log message Author Age Path
530 ORPSoC update

Ethernet MAC Wishbone interface fixes

Beginnings of software update.

ML501 backend script fixes for new ISE
julius 4804d 23h /openrisc/trunk/orpsocv2/
528 ORPSoC SPI flash programming link script bug fix julius 4809d 22h /openrisc/trunk/orpsocv2/
506 ORPSoC or1200 interrupt and syscall generation test julius 4830d 17h /openrisc/trunk/orpsocv2/
505 OR1200 overflow detection fixup

SPIflash program update

or1200 driver library timer improvement
julius 4830d 18h /openrisc/trunk/orpsocv2/
504 ORPSoC ALU update with new comparison configuration option, software test for comparisons and register file comment cleanup julius 4847d 13h /openrisc/trunk/orpsocv2/
503 ORPSoC's or1200 defines fix to indicate we don't actually have I/DMMU invalidate registers. julius 4848d 09h /openrisc/trunk/orpsocv2/
502 ORPSoC update - or1200, ethmac Xilinx fifos
or1200 in ORPSoC has carry bit, overflow bit, and range exception added and tested. New software tests in ORPSoC library. Ml501 build had ethmac fifos added, and or1200_defines updated to use these new or1200 features by default
julius 4850d 13h /openrisc/trunk/orpsocv2/
501 ORPSoC or1200 mult/mac/divide unit serial arith bug fixed.
ORPSoC or1200 defines now use serial divide by default
julius 4851d 14h /openrisc/trunk/orpsocv2/
500 ORPSoC's System C UART model can now accept input from stdin during simulation to drive consoles etc

ML501 simulation makefile update to allow custom ELFs to be specified
julius 4851d 17h /openrisc/trunk/orpsocv2/
499 ORPSoC OR1200 updates - added l.ext instructions with tests, ammended some MAC bugs, decode stage cleanup julius 4852d 10h /openrisc/trunk/orpsocv2/
496 ORPSoC ml501 updates - increased frequency, updated documentation julius 4854d 20h /openrisc/trunk/orpsocv2/
495 ORPSoC adding more accessor functions to Micron SDRAM model. julius 4854d 20h /openrisc/trunk/orpsocv2/
493 ORPSoC VPI JTAG interface, hopefully fix 64-bit machine compile issues. julius 4867d 22h /openrisc/trunk/orpsocv2/
492 ORPSoC VPI interface for modelsim and documentation update julius 4868d 20h /openrisc/trunk/orpsocv2/
491 ORPSoC or1200_monitor update. julius 4869d 07h /openrisc/trunk/orpsocv2/
489 ORPSoC sw cleanup. Remove warnings. julius 4878d 20h /openrisc/trunk/orpsocv2/
488 ORPSoC OR1200 driver - tick timer exception handler reverted to generic - cpu tick function hook used as default in handler table. OR1200 timer demo sw for board added. julius 4878d 20h /openrisc/trunk/orpsocv2/
487 ORPSoC main software makefile update julius 4881d 18h /openrisc/trunk/orpsocv2/
486 ORPSoC updates, mainly software, i2c driver julius 4881d 18h /openrisc/trunk/orpsocv2/
485 ORPSoC updates - or1200 monitor now has separate defines file, ethmac updates to fifos and wishbone IF, board.h changes for UART (may propegate to other drivers with multiple cores, we'll see), crt0.S for or1200 now zeros all registers on reset, adding own ethernet tests for ML501 julius 4885d 23h /openrisc/trunk/orpsocv2/
480 ORPSoC updates - ml501 project cleanups, DDR2 cache bug fixes. julius 4903d 03h /openrisc/trunk/orpsocv2/
479 ORPSoC update to ml501 board port. Memory controller caching fixed up, does multiple lines of cache and Wishbone bursting. julius 4904d 03h /openrisc/trunk/orpsocv2/
478 ORPSoC update - ml501 or1200 cache configuration set to maximum, some cleanups. julius 4905d 18h /openrisc/trunk/orpsocv2/
477 ORPSoC update - Added ability to enable OR1200 caches up to 32KB, which requires line size of 32bytes and 8-beat Wishbone bursts.
Changed cache sizes of both instruction and data cache of reference design to 4kB each.
julius 4906d 02h /openrisc/trunk/orpsocv2/
476 ORPSoC updates. Added 16kB cache options to OR1200, now as default on reference design. Cleaned up simulation Makefile more. julius 4906d 20h /openrisc/trunk/orpsocv2/
475 ORPSoC main simulation makefile tidy up, addition of BSS test to cbasic test, addition or o1ksim config files for each board build, modification of BSS symbols in linker script and crt0. julius 4906d 22h /openrisc/trunk/orpsocv2/
470 ORPSoC OR1200 crt0 updates. julius 4910d 22h /openrisc/trunk/orpsocv2/
468 ORPSoC update:
Added USER_ELF and USER_VMEM options to reference design simulation scripts.
Changed use of absolute BOARD_PATH variable to simply BOARD relative to board path
ML501's board.h bootrom default now boot from SPI
julius 4911d 23h /openrisc/trunk/orpsocv2/
466 ORPSoC updates:
Add new test to determine processor's capabilities.
Fix up typo in example in spiflash app README
julius 4913d 03h /openrisc/trunk/orpsocv2/
465 ORPSoC SPI flash load Makefile and README updates. julius 4913d 17h /openrisc/trunk/orpsocv2/

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