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638 orpsoc: xilinx: use XILINX env variable

instead of rely on custom environment variables,
use the XILINX variable and instruct the user how to
source the scripts that set it.

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
stekern 4685d 06h /openrisc/trunk/orpsocv2/boards/
634 orpsoc: atlys: autoregenerate coregen cores

Instead of keeping binary .ngc files of the coregen
generated cores, use coregen to generate them from the .xco
and .cgp file
stekern 4690d 06h /openrisc/trunk/orpsocv2/boards/
633 orpsoc: add Digilent Atlys spartan6 board README

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
stekern 4690d 06h /openrisc/trunk/orpsocv2/boards/
632 orpsoc: add Digilent Atlys spartan6 board sw include file

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
stekern 4690d 06h /openrisc/trunk/orpsocv2/boards/
631 orpsoc: add Digilent Atlys spartan6 board testbench

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
stekern 4690d 06h /openrisc/trunk/orpsocv2/boards/
630 orpsoc: add Digilent Atlys spartan6 board backend

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
stekern 4690d 06h /openrisc/trunk/orpsocv2/boards/
629 orpsoc: add Digilent Atlys spartan6 board or1ksim configuration

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
stekern 4690d 06h /openrisc/trunk/orpsocv2/boards/
628 orpsoc: add Digilent Atlys spartan6 board Makefiles

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
stekern 4690d 06h /openrisc/trunk/orpsocv2/boards/
627 orpsoc: add Digilent Atlys spartan6 board rtl

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
stekern 4690d 06h /openrisc/trunk/orpsocv2/boards/
568 OPRSoC - adding Xilinx Xtreme DSP Spartan-3A 1800A board port and documentation julius 4742d 23h /openrisc/trunk/orpsocv2/boards/
563 Search for external cores in <board>/modules path olof 4755d 12h /openrisc/trunk/orpsocv2/boards/
560 ORPSoC update - update make scripts, XILINX_PATH setup changes.

Note - may require a change to XILINX_PATH on user systems.
julius 4763d 11h /openrisc/trunk/orpsocv2/boards/
544 ORPSoC ordb1a3pe1500 update - adding SD card controller. julius 4781d 00h /openrisc/trunk/orpsocv2/boards/
542 ORPSoC scripts cleanup. Now centralised.

Documentation updated for ml501's SPI programming, noting issues with ISE12.
julius 4786d 14h /openrisc/trunk/orpsocv2/boards/
530 ORPSoC update

Ethernet MAC Wishbone interface fixes

Beginnings of software update.

ML501 backend script fixes for new ISE
julius 4810d 00h /openrisc/trunk/orpsocv2/boards/
503 ORPSoC's or1200 defines fix to indicate we don't actually have I/DMMU invalidate registers. julius 4853d 11h /openrisc/trunk/orpsocv2/boards/
502 ORPSoC update - or1200, ethmac Xilinx fifos
or1200 in ORPSoC has carry bit, overflow bit, and range exception added and tested. New software tests in ORPSoC library. Ml501 build had ethmac fifos added, and or1200_defines updated to use these new or1200 features by default
julius 4855d 15h /openrisc/trunk/orpsocv2/boards/
500 ORPSoC's System C UART model can now accept input from stdin during simulation to drive consoles etc

ML501 simulation makefile update to allow custom ELFs to be specified
julius 4856d 18h /openrisc/trunk/orpsocv2/boards/
499 ORPSoC OR1200 updates - added l.ext instructions with tests, ammended some MAC bugs, decode stage cleanup julius 4857d 11h /openrisc/trunk/orpsocv2/boards/
496 ORPSoC ml501 updates - increased frequency, updated documentation julius 4859d 21h /openrisc/trunk/orpsocv2/boards/
492 ORPSoC VPI interface for modelsim and documentation update julius 4873d 22h /openrisc/trunk/orpsocv2/boards/
486 ORPSoC updates, mainly software, i2c driver julius 4886d 19h /openrisc/trunk/orpsocv2/boards/
485 ORPSoC updates - or1200 monitor now has separate defines file, ethmac updates to fifos and wishbone IF, board.h changes for UART (may propegate to other drivers with multiple cores, we'll see), crt0.S for or1200 now zeros all registers on reset, adding own ethernet tests for ML501 julius 4891d 00h /openrisc/trunk/orpsocv2/boards/
480 ORPSoC updates - ml501 project cleanups, DDR2 cache bug fixes. julius 4908d 04h /openrisc/trunk/orpsocv2/boards/
479 ORPSoC update to ml501 board port. Memory controller caching fixed up, does multiple lines of cache and Wishbone bursting. julius 4909d 04h /openrisc/trunk/orpsocv2/boards/
478 ORPSoC update - ml501 or1200 cache configuration set to maximum, some cleanups. julius 4910d 19h /openrisc/trunk/orpsocv2/boards/
475 ORPSoC main simulation makefile tidy up, addition of BSS test to cbasic test, addition or o1ksim config files for each board build, modification of BSS symbols in linker script and crt0. julius 4911d 23h /openrisc/trunk/orpsocv2/boards/
468 ORPSoC update:
Added USER_ELF and USER_VMEM options to reference design simulation scripts.
Changed use of absolute BOARD_PATH variable to simply BOARD relative to board path
ML501's board.h bootrom default now boot from SPI
julius 4917d 00h /openrisc/trunk/orpsocv2/boards/
449 ORPSoC - or1200_monitor.v additions enabling new experimental execution checks.

Replace use of "clean-all" with "distclean" as make rule to clean things.
julius 4943d 14h /openrisc/trunk/orpsocv2/boards/
439 ORPSoC update

Ethernet MAC synthesis issues with Actel Synplify D-2009.12A
Ethernet MAC FIFO synthesis issues with Xilinx XST

Multiply/divide tests for to run on target.

Added third interface to ram_wb module, changed reference design RAM to ram_wb
wrapper. Updated verilog and system C monitor modules accordingly.

Added ability to use ram_wb as internal memory on ML501 design.

Fixed ethernet MAC tests for ML501.
julius 4950d 18h /openrisc/trunk/orpsocv2/boards/

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