Rev |
Log message |
Author |
Age |
Path |
673 |
Multiple 64-bit fixes (mostly sign and size of constants). Fix bug #1. |
yannv |
4656d 15h |
/openrisc/trunk/orpsocv2/sw/ |
672 |
ORPSoC: Fix Bug 76 - Incorrect unsigned integer less-than compare with COMP3 option enabled
OR1200 RTL fix and software test added. |
julius |
4660d 06h |
/openrisc/trunk/orpsocv2/sw/ |
671 |
ORPSoC: Fix for Bug 75 - or1200-except and or1200-ticksyscall regression tests failing due to change in memory model |
julius |
4660d 06h |
/openrisc/trunk/orpsocv2/sw/ |
656 |
orpsoc: cfi_ctrl software driver fix to allow compilation when it's not used |
julius |
4711d 08h |
/openrisc/trunk/orpsocv2/sw/ |
655 |
ORPSoC: add CFI flash controller to ml501, sw driver, tests, app, documentation |
julius |
4711d 08h |
/openrisc/trunk/orpsocv2/sw/ |
619 |
ORPSoC OR1200 fix and regression test for bug 51.
signed-off Julius Baxter
reviewed by Stefan Kristiansson |
julius |
4792d 08h |
/openrisc/trunk/orpsocv2/sw/ |
567 |
ORPSoC ethmac test and diagnosis software program updates. |
julius |
4823d 21h |
/openrisc/trunk/orpsocv2/sw/ |
545 |
ORPSoC - revert unecessary i2c fix - driver oneliner was all that was needed. |
julius |
4861d 12h |
/openrisc/trunk/orpsocv2/sw/ |
542 |
ORPSoC scripts cleanup. Now centralised.
Documentation updated for ml501's SPI programming, noting issues with ISE12. |
julius |
4867d 09h |
/openrisc/trunk/orpsocv2/sw/ |
535 |
ORPSoC - adding sw tests for l.rfe |
julius |
4883d 10h |
/openrisc/trunk/orpsocv2/sw/ |
530 |
ORPSoC update
Ethernet MAC Wishbone interface fixes
Beginnings of software update.
ML501 backend script fixes for new ISE |
julius |
4890d 19h |
/openrisc/trunk/orpsocv2/sw/ |
528 |
ORPSoC SPI flash programming link script bug fix |
julius |
4895d 19h |
/openrisc/trunk/orpsocv2/sw/ |
506 |
ORPSoC or1200 interrupt and syscall generation test |
julius |
4916d 13h |
/openrisc/trunk/orpsocv2/sw/ |
505 |
OR1200 overflow detection fixup
SPIflash program update
or1200 driver library timer improvement |
julius |
4916d 14h |
/openrisc/trunk/orpsocv2/sw/ |
504 |
ORPSoC ALU update with new comparison configuration option, software test for comparisons and register file comment cleanup |
julius |
4933d 10h |
/openrisc/trunk/orpsocv2/sw/ |
502 |
ORPSoC update - or1200, ethmac Xilinx fifos
or1200 in ORPSoC has carry bit, overflow bit, and range exception added and tested. New software tests in ORPSoC library. Ml501 build had ethmac fifos added, and or1200_defines updated to use these new or1200 features by default |
julius |
4936d 10h |
/openrisc/trunk/orpsocv2/sw/ |
499 |
ORPSoC OR1200 updates - added l.ext instructions with tests, ammended some MAC bugs, decode stage cleanup |
julius |
4938d 06h |
/openrisc/trunk/orpsocv2/sw/ |
496 |
ORPSoC ml501 updates - increased frequency, updated documentation |
julius |
4940d 17h |
/openrisc/trunk/orpsocv2/sw/ |
489 |
ORPSoC sw cleanup. Remove warnings. |
julius |
4964d 16h |
/openrisc/trunk/orpsocv2/sw/ |
488 |
ORPSoC OR1200 driver - tick timer exception handler reverted to generic - cpu tick function hook used as default in handler table. OR1200 timer demo sw for board added. |
julius |
4964d 17h |
/openrisc/trunk/orpsocv2/sw/ |
487 |
ORPSoC main software makefile update |
julius |
4967d 15h |
/openrisc/trunk/orpsocv2/sw/ |
486 |
ORPSoC updates, mainly software, i2c driver |
julius |
4967d 15h |
/openrisc/trunk/orpsocv2/sw/ |
485 |
ORPSoC updates - or1200 monitor now has separate defines file, ethmac updates to fifos and wishbone IF, board.h changes for UART (may propegate to other drivers with multiple cores, we'll see), crt0.S for or1200 now zeros all registers on reset, adding own ethernet tests for ML501 |
julius |
4971d 19h |
/openrisc/trunk/orpsocv2/sw/ |
479 |
ORPSoC update to ml501 board port. Memory controller caching fixed up, does multiple lines of cache and Wishbone bursting. |
julius |
4989d 23h |
/openrisc/trunk/orpsocv2/sw/ |
477 |
ORPSoC update - Added ability to enable OR1200 caches up to 32KB, which requires line size of 32bytes and 8-beat Wishbone bursts.
Changed cache sizes of both instruction and data cache of reference design to 4kB each. |
julius |
4991d 23h |
/openrisc/trunk/orpsocv2/sw/ |
475 |
ORPSoC main simulation makefile tidy up, addition of BSS test to cbasic test, addition or o1ksim config files for each board build, modification of BSS symbols in linker script and crt0. |
julius |
4992d 19h |
/openrisc/trunk/orpsocv2/sw/ |
470 |
ORPSoC OR1200 crt0 updates. |
julius |
4996d 19h |
/openrisc/trunk/orpsocv2/sw/ |
468 |
ORPSoC update:
Added USER_ELF and USER_VMEM options to reference design simulation scripts.
Changed use of absolute BOARD_PATH variable to simply BOARD relative to board path
ML501's board.h bootrom default now boot from SPI |
julius |
4997d 20h |
/openrisc/trunk/orpsocv2/sw/ |
466 |
ORPSoC updates:
Add new test to determine processor's capabilities.
Fix up typo in example in spiflash app README |
julius |
4998d 23h |
/openrisc/trunk/orpsocv2/sw/ |
465 |
ORPSoC SPI flash load Makefile and README updates. |
julius |
4999d 13h |
/openrisc/trunk/orpsocv2/sw/ |