OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] - Rev 796

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
791 Added options to configure RAM and ROM sizes. Fixed cache handling. skrzyp 4450d 11h /openrisc/trunk/rtos/
790 fixed issues with context switching, interrupts, optimizations and cleanups skrzyp 4457d 11h /openrisc/trunk/rtos/
786 new ecos tree (tracking mainline) skrzyp 4462d 16h /openrisc/trunk/rtos/
785 We are about to upload a new tree (that has a different structure) skrzyp 4462d 16h /openrisc/trunk/rtos/
678 added credits skrzyp 4485d 11h /openrisc/trunk/rtos/
675 FreeRTOSV6.1.1
Source cleanup
Add redzone beyond the stack pointer		 filepang 4524d 03h /openrisc/trunk/rtos/
669 FreeRTOSV6.1.1
source cleanup, delete uncecessary code		 filepang 4567d 12h /openrisc/trunk/rtos/
668 FreeRTOSV6.1.1
add missing 'make clean' in make script		 filepang 4568d 03h /openrisc/trunk/rtos/
666 FreeRTOSV6.1.1
minimal set of standard demo task is working		 filepang 4570d 11h /openrisc/trunk/rtos/
665 FreeRTOSV6.1.1
fix context save/restore stack size bug
remove unnecessary line		 filepang 4570d 11h /openrisc/trunk/rtos/
664 FreeRTOSV6.1.1
modify processor abstraction layer.
now,all tasks are running in supervisor mode		 filepang 4570d 11h /openrisc/trunk/rtos/
659 Fixed longjmp hal implementation skrzyp 4592d 15h /openrisc/trunk/rtos/
658 example configuration uses RAM startup skrzyp 4610d 13h /openrisc/trunk/rtos/
657 test generation fixed skrzyp 4610d 14h /openrisc/trunk/rtos/
654 added eCos-3.0 port skrzyp 4616d 10h /openrisc/trunk/rtos/
649 porting some of standard demo tasks

fix serial port(UART) interrupt handler		 filepang 4645d 11h /openrisc/trunk/rtos/
637 porint parallel port(gpio) management task filepang 4672d 11h /openrisc/trunk/rtos/
636 porting serial port management task, interrupt hander filepang 4672d 11h /openrisc/trunk/rtos/
624 add missing delay slot instruction
vPortDisableInterrupts
vPortEnableInterrupts		 filepang 4684d 18h /openrisc/trunk/rtos/
623 cleanup source code
Demo/OpenRISC_SIM_GCC/arch/support.h
Demo/OpenRISC_SIM_GCC/arch/interrupts.h
Demo/OpenRISC_SIM_GCC/arch/link.ld

add gpio driver

add gpio base address definition		 filepang 4685d 10h /openrisc/trunk/rtos/
622 update uart driver for support multiple uart cores
from http://opencores.org/ocsvn/openrisc/openrisc/trunk/orpsocv2/sw/drivers/uart		 filepang 4685d 12h /openrisc/trunk/rtos/
621 update sim.cfg for newer version of Or1ksim.
remove unused files.
cleanup source code.

insert non-local jump(setjmp) in xPortStartScheduler. now xPortStartScheduler() will
be returned by xPortEndScheduler().		 filepang 4687d 04h /openrisc/trunk/rtos/
620 remove unused file
cleanup makefile
update uart_init(), disable interrupt before initialize.		 jeremybennett 4687d 17h /openrisc/trunk/rtos/
616 Initial port of FreeRTOS by filepang (Kim Sung Su). jeremybennett 4701d 13h /openrisc/trunk/rtos/
615 Initial port of FreeRTOS by filepang (Kim Sung Su). jeremybennett 4701d 13h /openrisc/trunk/rtos/
614 Initial port of FreeRTOS by filepang (Kim Sung Su). jeremybennett 4701d 13h /openrisc/trunk/rtos/
613 Initial port of FreeRTOS by filepang (Kim Sung Su). jeremybennett 4701d 13h /openrisc/trunk/rtos/
612 Initial port of FreeRTOS by filepang (Kim Sung Su). jeremybennett 4701d 13h /openrisc/trunk/rtos/
611 Initial port of FreeRTOS by filepang (Kim Sung Su). jeremybennett 4701d 13h /openrisc/trunk/rtos/
610 Initial port of FreeRTOS by filepang (Kim Sung Su). jeremybennett 4701d 13h /openrisc/trunk/rtos/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.