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[/] [or1k/] [branches/] [stable_0_1_x/] - Rev 1001

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Rev Log message Author Age Path
1001 fixed load/store state machine verilog generation errors markom 8000d 14h /or1k/branches/stable_0_1_x/
1000 IC/DC cache enable routines fixed. simons 8000d 14h /or1k/branches/stable_0_1_x/
999 Now every ramdisk image should have init program. simons 8000d 15h /or1k/branches/stable_0_1_x/
998 added missing fout initialization markom 8000d 17h /or1k/branches/stable_0_1_x/
997 PRINTF should be used instead of printf; command redirection repaired markom 8000d 18h /or1k/branches/stable_0_1_x/
996 some minor bugs fixed markom 8001d 17h /or1k/branches/stable_0_1_x/
994 Store buffer has been tested and it works. BY default it is still disabled until uClinux confirms correct operation on FPGA board. lampret 8002d 00h /or1k/branches/stable_0_1_x/
993 Fixed IMMU bug. lampret 8002d 00h /or1k/branches/stable_0_1_x/
992 A bug when cache enabled and bus error comes fixed. simons 8002d 09h /or1k/branches/stable_0_1_x/
991 Different memory controller. simons 8002d 09h /or1k/branches/stable_0_1_x/
990 Test is now complete. simons 8002d 10h /or1k/branches/stable_0_1_x/
989 c++ is making problems so, for now, it is excluded. simons 8003d 17h /or1k/branches/stable_0_1_x/
988 ORP architecture supported. simons 8004d 09h /or1k/branches/stable_0_1_x/
987 ORP architecture supported. simons 8004d 16h /or1k/branches/stable_0_1_x/
986 outputs out of function are not registered anymore markom 8004d 17h /or1k/branches/stable_0_1_x/
985 DTLB translation doesn't work on or1ksim when IC/DC enabled. lampret 8005d 04h /or1k/branches/stable_0_1_x/
984 Disable SB until it is tested lampret 8005d 05h /or1k/branches/stable_0_1_x/
983 First checkin lampret 8005d 07h /or1k/branches/stable_0_1_x/
982 Moved to sim/bin lampret 8005d 07h /or1k/branches/stable_0_1_x/
981 First checkin. lampret 8005d 07h /or1k/branches/stable_0_1_x/
980 Removed sim.tcl that shouldn't be here. lampret 8005d 07h /or1k/branches/stable_0_1_x/
979 Removed old test case binaries. lampret 8005d 07h /or1k/branches/stable_0_1_x/
978 Added variable delay for SRAM. lampret 8005d 07h /or1k/branches/stable_0_1_x/
977 Added store buffer. lampret 8005d 07h /or1k/branches/stable_0_1_x/
976 Added store buffer lampret 8005d 07h /or1k/branches/stable_0_1_x/
975 First checkin lampret 8005d 07h /or1k/branches/stable_0_1_x/
974 Enabled what works on or1ksim and disabled other tests. lampret 8005d 09h /or1k/branches/stable_0_1_x/
973 generated cuc top scheduler builds without syntax errors; not tested yet markom 8007d 13h /or1k/branches/stable_0_1_x/
972 Interrupt suorces fixed. simons 8007d 13h /or1k/branches/stable_0_1_x/
971 Now even keyboard test passes. simons 8007d 16h /or1k/branches/stable_0_1_x/

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