Rev |
Log message |
Author |
Age |
Path |
1176 |
Added comments. |
damonb |
7703d 12h |
/or1k/tags/nog_patch_35/ |
1174 |
fix for immu exceptions that never should have happened |
phoenix |
7704d 16h |
/or1k/tags/nog_patch_35/ |
1170 |
Added support for l.addc instruction. |
csanchez |
7712d 20h |
/or1k/tags/nog_patch_35/ |
1169 |
Added support for l.addc instruction. |
csanchez |
7712d 20h |
/or1k/tags/nog_patch_35/ |
1168 |
Added explicit alignment expressions. |
csanchez |
7718d 06h |
/or1k/tags/nog_patch_35/ |
1167 |
Corrected offset of TSS field within task_struct. |
csanchez |
7718d 06h |
/or1k/tags/nog_patch_35/ |
1166 |
Fixed problem with relocations of non-allocated sections. |
csanchez |
7718d 06h |
/or1k/tags/nog_patch_35/ |
1165 |
timeout bug fixed; contribution by Carlos |
markom |
7735d 00h |
/or1k/tags/nog_patch_35/ |
1161 |
When OR1200_NO_IMMU and OR1200_NO_IC are not both defined or undefined at the same time, results in a IC bug. Fixed. |
lampret |
7738d 13h |
/or1k/tags/nog_patch_35/ |
1160 |
added missing .rodata.* section into rom linker script |
phoenix |
7769d 13h |
/or1k/tags/nog_patch_35/ |
1159 |
No functional changes. Added defines to disable implementation of multiplier/MAC |
lampret |
7781d 15h |
/or1k/tags/nog_patch_35/ |
1158 |
Added simple uart test case. |
lampret |
7782d 17h |
/or1k/tags/nog_patch_35/ |
1157 |
Added syscall test case. |
lampret |
7782d 17h |
/or1k/tags/nog_patch_35/ |
1156 |
Tick timer test case added. |
lampret |
7783d 13h |
/or1k/tags/nog_patch_35/ |
1155 |
No functional change. Only added customization for exception vectors. |
lampret |
7784d 17h |
/or1k/tags/nog_patch_35/ |
1154 |
When using tty channel, put the serial port into raw mode (no echo, no
CR/LF conversion, no other line discipline/buffering). |
sfurman |
7792d 09h |
/or1k/tags/nog_patch_35/ |
1153 |
When multiple interrupts were pending, e.g. TX buffer empty and RX
available, reading the UART's IIR register could potentially clear a
TX interrupt before it had been sent to the processor, thus dropping
the interrupt permanently.
Fix tested w/ both eCos and uclinux. |
sfurman |
7792d 19h |
/or1k/tags/nog_patch_35/ |
1152 |
*** empty log message *** |
phoenix |
7792d 23h |
/or1k/tags/nog_patch_35/ |
1151 |
*** empty log message *** |
phoenix |
7792d 23h |
/or1k/tags/nog_patch_35/ |
1150 |
remove unneded include |
phoenix |
7793d 01h |
/or1k/tags/nog_patch_35/ |
1149 |
*** empty log message *** |
phoenix |
7793d 12h |
/or1k/tags/nog_patch_35/ |
1148 |
*** empty log message *** |
phoenix |
7793d 13h |
/or1k/tags/nog_patch_35/ |
1147 |
remove unneeded include |
phoenix |
7793d 13h |
/or1k/tags/nog_patch_35/ |
1146 |
cygwin fix |
phoenix |
7793d 13h |
/or1k/tags/nog_patch_35/ |
1145 |
1) Fix trivial bug w/ transmitter empty interrupts that I introduced in the
last check-in.
2) Improve printed output from debugging-only uart_status() routine. |
sfurman |
7793d 13h |
/or1k/tags/nog_patch_35/ |
1144 |
Speed up gdb when running with serial targets:
When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)
When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump. |
sfurman |
7795d 19h |
/or1k/tags/nog_patch_35/ |
1143 |
Make UART transmitter-empty interrupts match both 16450 and 16550 behavior. |
sfurman |
7796d 09h |
/or1k/tags/nog_patch_35/ |
1142 |
Speed up gdb when running with serial targets:
When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)
When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump. |
sfurman |
7796d 09h |
/or1k/tags/nog_patch_35/ |
1141 |
WB = 1/2 RISC clock test code enabled. |
lampret |
7797d 19h |
/or1k/tags/nog_patch_35/ |
1140 |
Fixed OR1200_CLKDIV_x_SUPPORTED defines. Fixed order of ifdefs. |
lampret |
7797d 19h |
/or1k/tags/nog_patch_35/ |