OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_35/] - Rev 626

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
626 store buffer added markom 8201d 21h /or1k/tags/nog_patch_35/
625 Bus error bug fixed. Cache routines added. simons 8202d 13h /or1k/tags/nog_patch_35/
624 Added logging of writes/read to/from SPR registers. ivang 8202d 13h /or1k/tags/nog_patch_35/
623 update based on recent changes; arithmetic instructions does not modify carry yet markom 8202d 15h /or1k/tags/nog_patch_35/
622 Cache test works on hardware. simons 8202d 18h /or1k/tags/nog_patch_35/
621 Cache test works on hardware. simons 8202d 19h /or1k/tags/nog_patch_35/
620 use ARITH_SET_FLAG to turn off set flag by arith. instructions markom 8202d 19h /or1k/tags/nog_patch_35/
619 all test pass, after newest changes markom 8202d 19h /or1k/tags/nog_patch_35/
618 Fixed display of new 'void' nop insns. lampret 8203d 04h /or1k/tags/nog_patch_35/
617 Changed 'void' nop-ops instead of insn[0] to use insn[16]. Debug unit stalls the tick timer. Prepared new flag generation for add and and insns. Blocked DC/IC while they are turned off. Fixed I/D MMU SPRs layout except WAYs. TODO: smart IC invalidate, l.j 2 and TLB ways. lampret 8203d 04h /or1k/tags/nog_patch_35/
616 flags test added markom 8205d 14h /or1k/tags/nog_patch_35/
615 cmov and extxx instructions; add, addi, and, andi now set flag markom 8205d 15h /or1k/tags/nog_patch_35/
614 Changed to support new debug if. simons 8205d 22h /or1k/tags/nog_patch_35/
613 init: trap exception occurs always; initialization of sr not needed anymore markom 8206d 19h /or1k/tags/nog_patch_35/
612 Tick timer period extended to meet real timing. simons 8206d 20h /or1k/tags/nog_patch_35/
611 EEAR register is not changed by trap, sys, int, tick and range exception. simons 8207d 21h /or1k/tags/nog_patch_35/
610 Changed default reset values for SR and ESR to match or1ksim's. Fixed flop model in or1200_dpram_32x32 when OR1200_XILINX_RAM32X1D is defined. lampret 8207d 22h /or1k/tags/nog_patch_35/
609 Added wb_err_o to flash and sram i/f for testing the buserr exception. lampret 8207d 22h /or1k/tags/nog_patch_35/
608 Range exception removed from test. simons 8208d 17h /or1k/tags/nog_patch_35/
607 single step steps just one instruction ^c bug fixed markom 8208d 17h /or1k/tags/nog_patch_35/
606 raw register range bug fixed; acv_uart test passes markom 8209d 18h /or1k/tags/nog_patch_35/
605 simulator prints out a message, when gdb is not attached and stall occurs; OV flag fixed markom 8209d 18h /or1k/tags/nog_patch_35/
604 mul test repaired - signed multiplication; obsolete pic test removed; make check pass markom 8209d 18h /or1k/tags/nog_patch_35/
603 fixed bfd markom 8209d 20h /or1k/tags/nog_patch_35/
602 Renamed targets. Switched off debug. lampret 8210d 18h /or1k/tags/nog_patch_35/
601 or1k has anly one external interrupt exception. Tick timer exception added. simons 8211d 06h /or1k/tags/nog_patch_35/
600 No more low/high priority interrupts (PICPR removed). Added tick timer exception. simons 8211d 07h /or1k/tags/nog_patch_35/
599 No more low/high priority interrupts (PICPR removed). Added tick timer exception. simons 8211d 07h /or1k/tags/nog_patch_35/
598 Fixed SR[EXR] (this is now actually SR[TEE]) lampret 8211d 15h /or1k/tags/nog_patch_35/
597 Fixed OR1200_XILINX_RAM32X1D. lampret 8211d 15h /or1k/tags/nog_patch_35/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.