Rev |
Log message |
Author |
Age |
Path |
1154 |
When using tty channel, put the serial port into raw mode (no echo, no
CR/LF conversion, no other line discipline/buffering). |
sfurman |
7783d 22h |
/or1k/tags/nog_patch_37/ |
1153 |
When multiple interrupts were pending, e.g. TX buffer empty and RX
available, reading the UART's IIR register could potentially clear a
TX interrupt before it had been sent to the processor, thus dropping
the interrupt permanently.
Fix tested w/ both eCos and uclinux. |
sfurman |
7784d 08h |
/or1k/tags/nog_patch_37/ |
1152 |
*** empty log message *** |
phoenix |
7784d 12h |
/or1k/tags/nog_patch_37/ |
1151 |
*** empty log message *** |
phoenix |
7784d 12h |
/or1k/tags/nog_patch_37/ |
1150 |
remove unneded include |
phoenix |
7784d 14h |
/or1k/tags/nog_patch_37/ |
1149 |
*** empty log message *** |
phoenix |
7785d 01h |
/or1k/tags/nog_patch_37/ |
1148 |
*** empty log message *** |
phoenix |
7785d 01h |
/or1k/tags/nog_patch_37/ |
1147 |
remove unneeded include |
phoenix |
7785d 01h |
/or1k/tags/nog_patch_37/ |
1146 |
cygwin fix |
phoenix |
7785d 01h |
/or1k/tags/nog_patch_37/ |
1145 |
1) Fix trivial bug w/ transmitter empty interrupts that I introduced in the
last check-in.
2) Improve printed output from debugging-only uart_status() routine. |
sfurman |
7785d 02h |
/or1k/tags/nog_patch_37/ |
1144 |
Speed up gdb when running with serial targets:
When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)
When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump. |
sfurman |
7787d 08h |
/or1k/tags/nog_patch_37/ |
1143 |
Make UART transmitter-empty interrupts match both 16450 and 16550 behavior. |
sfurman |
7787d 22h |
/or1k/tags/nog_patch_37/ |
1142 |
Speed up gdb when running with serial targets:
When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)
When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump. |
sfurman |
7787d 22h |
/or1k/tags/nog_patch_37/ |
1141 |
WB = 1/2 RISC clock test code enabled. |
lampret |
7789d 07h |
/or1k/tags/nog_patch_37/ |
1140 |
Fixed OR1200_CLKDIV_x_SUPPORTED defines. Fixed order of ifdefs. |
lampret |
7789d 07h |
/or1k/tags/nog_patch_37/ |
1139 |
Fixed OR1200_CLKDIV_x_SUPPORTED defines. Better description. |
lampret |
7789d 07h |
/or1k/tags/nog_patch_37/ |
1138 |
Added some information how to run simulations. |
lampret |
7790d 03h |
/or1k/tags/nog_patch_37/ |
1137 |
Added RFRAM generic and Altera lpm library. |
lampret |
7790d 03h |
/or1k/tags/nog_patch_37/ |
1136 |
Add altera lpm library. |
lampret |
7790d 03h |
/or1k/tags/nog_patch_37/ |
1135 |
Added get_gpr support for OR1200_RFRAM_GENERIC |
lampret |
7790d 03h |
/or1k/tags/nog_patch_37/ |
1134 |
Changed location of debug test code to 0. |
lampret |
7790d 03h |
/or1k/tags/nog_patch_37/ |
1133 |
Adding OR1200_CLMODE_1TO2 test code. |
lampret |
7790d 03h |
/or1k/tags/nog_patch_37/ |
1132 |
RFRAM defines comments updated. Altera LPM option added. |
lampret |
7790d 03h |
/or1k/tags/nog_patch_37/ |
1131 |
Added another pipe stage to match gmult. One day second pipe in amult and gmult might be removed to get better performance. |
lampret |
7790d 03h |
/or1k/tags/nog_patch_37/ |
1130 |
RFRAM type always need to be defined. |
lampret |
7790d 03h |
/or1k/tags/nog_patch_37/ |
1129 |
Added Altera LPM RAMs. Changed generic RAM output when OE inactive. |
lampret |
7790d 03h |
/or1k/tags/nog_patch_37/ |
1128 |
Fixed my bustage: Add missing 2nd argument to open(). Otherwise,
opening a serial port channel can sporadically fail. |
sfurman |
7795d 02h |
/or1k/tags/nog_patch_37/ |
1127 |
Added ability to map I/O from simulated UARTs to physical serial ports
on the host running the simulator. |
sfurman |
7798d 03h |
/or1k/tags/nog_patch_37/ |
1126 |
Added lengthy comment explaining all possible choices for UART
channels, e.g. xterm, tcp, file, etc. |
sfurman |
7800d 05h |
/or1k/tags/nog_patch_37/ |
1125 |
This test case passes. |
lampret |
7811d 09h |
/or1k/tags/nog_patch_37/ |