OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_39/] - Rev 217

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
217 Fixed some synthesis warnings. Configured with caches and MMUs. lampret 8334d 16h /or1k/tags/nog_patch_39/
216 No longer needed. lampret 8340d 02h /or1k/tags/nog_patch_39/
215 MP3 version. lampret 8340d 02h /or1k/tags/nog_patch_39/
214 Removed redundant "long long" checks erez 8350d 04h /or1k/tags/nog_patch_39/
213 Added test5 for DMA erez 8350d 05h /or1k/tags/nog_patch_39/
212 Added DMA erez 8350d 05h /or1k/tags/nog_patch_39/
211 Added check for "long long" erez 8350d 05h /or1k/tags/nog_patch_39/
210 Updated debug. More cleanup. Added MAC. lampret 8353d 11h /or1k/tags/nog_patch_39/
209 Update debug. lampret 8355d 16h /or1k/tags/nog_patch_39/
208 Initial checkin with working port to or1k chris 8357d 03h /or1k/tags/nog_patch_39/
207 Several major changes to allow gdb to work with an Or1k implementation
that does not need a writeable PC. This version will use the breakpoint
vector and install a new vector into the EPC register, and then single
step out of the breakpoint exception. The breakpoint exception vector
must include only 2 commands: l.rfe and l.nop. Anything else and this
gdb version will fail w/ or1ksim.
chris 8357d 07h /or1k/tags/nog_patch_39/
206 Several modifications to support gdb in a new exception style mode.
This new version works with gdb, and does not require the simulator
to implement a writeable PC.
chris 8357d 07h /or1k/tags/nog_patch_39/
205 Adding debug capabilities. Half done. lampret 8361d 10h /or1k/tags/nog_patch_39/
204 Added function prototypes to stop gcc from complaining erez 8364d 02h /or1k/tags/nog_patch_39/
203 Updated from xess branch. lampret 8365d 15h /or1k/tags/nog_patch_39/
202 changed configure.in and acconfig.h to check for long long
reran autoheader & autoconf
erez 8370d 23h /or1k/tags/nog_patch_39/
201 readfunc() and writefunc() now use unsigned long values instead of unsigned char. erez 8370d 23h /or1k/tags/nog_patch_39/
200 Initial import simons 8374d 06h /or1k/tags/nog_patch_39/
199 Initial import simons 8374d 08h /or1k/tags/nog_patch_39/
198 Moved from testbench.old simons 8376d 18h /or1k/tags/nog_patch_39/
197 This is not used any more. simons 8376d 19h /or1k/tags/nog_patch_39/
196 Configuration SPRs added. simons 8376d 19h /or1k/tags/nog_patch_39/
195 New test added. simons 8376d 19h /or1k/tags/nog_patch_39/
194 Fixed a bug for little endian architectures. Could cause a hang of
gdb under some circumstances.
chris 8377d 03h /or1k/tags/nog_patch_39/
193 Declared RISCOP.RESET to be volatile so that -O2 optimization would
not optimize away the correct behavior by trying to be too clever.
chris 8377d 03h /or1k/tags/nog_patch_39/
192 Removed GlobalMode reference causing problems for --disable-debugmod
option.
chris 8377d 12h /or1k/tags/nog_patch_39/
191 Added UART jitter var to sim config chris 8378d 09h /or1k/tags/nog_patch_39/
190 Added jitter initialization chris 8378d 09h /or1k/tags/nog_patch_39/
189 fixed mode handling for tick facility chris 8378d 09h /or1k/tags/nog_patch_39/
188 fixed PIC interrupt controller chris 8378d 09h /or1k/tags/nog_patch_39/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.