OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_42/] - Rev 1198

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
1198 make it compile on RH 8,9 phoenix 7619d 17h /or1k/tags/nog_patch_42/
1197 disabled ram-init of ps2 (old) +
changed MAC type into DOS type, so that Xilinx ISE can work with it
dries 7624d 22h /or1k/tags/nog_patch_42/
1196 removed second debug/Makefile (credits: Daniel Wiklund - danwi@isy.liu.se) dries 7624d 23h /or1k/tags/nog_patch_42/
1195 made the project file a little bit more universal dries 7625d 00h /or1k/tags/nog_patch_42/
1194 correct all the syntax errors dries 7625d 01h /or1k/tags/nog_patch_42/
1193 disabled SRAM_GENERIC and added comment +
corrected 'wb_err' into 'wb_err_o'
dries 7625d 01h /or1k/tags/nog_patch_42/
1192 disabled 'bench_defines.v' during synthesis +
added define to specify usage of flash instruction address
dries 7625d 02h /or1k/tags/nog_patch_42/
1191 disabled 'bench_defines.v' during synthesis +
added define to specify usage of flash instruction address
dries 7625d 02h /or1k/tags/nog_patch_42/
1188 Added support for rams with byte write access. simons 7641d 01h /or1k/tags/nog_patch_42/
1186 Added support for rams with byte write access. simons 7642d 00h /or1k/tags/nog_patch_42/
1184 Scan signals mess fixed. simons 7648d 17h /or1k/tags/nog_patch_42/
1183 OpenRISC port of gdb-5.3 straightforwardly derived from gdb-5.0 sfurman 7653d 08h /or1k/tags/nog_patch_42/
1181 Initial import of unmodified gdb-5.3 source on vendor branch sfurman 7653d 11h /or1k/tags/nog_patch_42/
1179 BIST interface added for Artisan memory instances. simons 7656d 20h /or1k/tags/nog_patch_42/
1178 avoid another immu exception that should not happen phoenix 7686d 08h /or1k/tags/nog_patch_42/
1177 more informative output phoenix 7687d 14h /or1k/tags/nog_patch_42/
1176 Added comments. damonb 7688d 06h /or1k/tags/nog_patch_42/
1174 fix for immu exceptions that never should have happened phoenix 7689d 09h /or1k/tags/nog_patch_42/
1170 Added support for l.addc instruction. csanchez 7697d 13h /or1k/tags/nog_patch_42/
1169 Added support for l.addc instruction. csanchez 7697d 14h /or1k/tags/nog_patch_42/
1168 Added explicit alignment expressions. csanchez 7703d 00h /or1k/tags/nog_patch_42/
1167 Corrected offset of TSS field within task_struct. csanchez 7703d 00h /or1k/tags/nog_patch_42/
1166 Fixed problem with relocations of non-allocated sections. csanchez 7703d 00h /or1k/tags/nog_patch_42/
1165 timeout bug fixed; contribution by Carlos markom 7719d 18h /or1k/tags/nog_patch_42/
1161 When OR1200_NO_IMMU and OR1200_NO_IC are not both defined or undefined at the same time, results in a IC bug. Fixed. lampret 7723d 07h /or1k/tags/nog_patch_42/
1160 added missing .rodata.* section into rom linker script phoenix 7754d 07h /or1k/tags/nog_patch_42/
1159 No functional changes. Added defines to disable implementation of multiplier/MAC lampret 7766d 09h /or1k/tags/nog_patch_42/
1158 Added simple uart test case. lampret 7767d 11h /or1k/tags/nog_patch_42/
1157 Added syscall test case. lampret 7767d 11h /or1k/tags/nog_patch_42/
1156 Tick timer test case added. lampret 7768d 07h /or1k/tags/nog_patch_42/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.