| Rev |
Log message |
Author |
Age |
Path |
| 1384 |
Fix the parameters to the l.ff1/l.maci instructions |
nogj |
7062d 05h |
/or1k/tags/nog_patch_44/insight/ |
| 1350 |
Mark a simulated cpu address as such, by introducing the new oraddr_t type |
nogj |
7097d 00h |
/or1k/tags/nog_patch_44/insight/ |
| 1346 |
Remove the global op structure |
nogj |
7110d 03h |
/or1k/tags/nog_patch_44/insight/ |
| 1344 |
* Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes |
nogj |
7110d 04h |
/or1k/tags/nog_patch_44/insight/ |
| 1342 |
* Fix generate.c to produce a execgen.c with less warnings.
* Fix the --enable-simple configure option. |
nogj |
7110d 04h |
/or1k/tags/nog_patch_44/insight/ |
| 1341 |
Mark wich operand is the destination operand in the architechture definition |
nogj |
7110d 04h |
/or1k/tags/nog_patch_44/insight/ |
| 1338 |
l.ff1 instruction added |
andreje |
7126d 02h |
/or1k/tags/nog_patch_44/insight/ |
| 1333 |
gcc 3.4 compile fix |
phoenix |
7141d 03h |
/or1k/tags/nog_patch_44/insight/ |
| 1309 |
removed includes |
phoenix |
7298d 21h |
/or1k/tags/nog_patch_44/insight/ |
| 1308 |
Gyorgy Jeney: extensive cleanup |
phoenix |
7301d 18h |
/or1k/tags/nog_patch_44/insight/ |
| 1295 |
Updated instruction set descriptions. Changed FP instructions encoding. |
lampret |
7323d 19h |
/or1k/tags/nog_patch_44/insight/ |
| 1286 |
Changed desciption of the l.cust5 insns |
lampret |
7372d 22h |
/or1k/tags/nog_patch_44/insight/ |
| 1285 |
Changed desciption of the l.cust5 insns |
lampret |
7372d 22h |
/or1k/tags/nog_patch_44/insight/ |
| 1256 |
page size is 8192 on or32 |
phoenix |
7457d 22h |
/or1k/tags/nog_patch_44/insight/ |
| 1169 |
Added support for l.addc instruction. |
csanchez |
7685d 22h |
/or1k/tags/nog_patch_44/insight/ |
| 1152 |
*** empty log message *** |
phoenix |
7766d 01h |
/or1k/tags/nog_patch_44/insight/ |
| 1149 |
*** empty log message *** |
phoenix |
7766d 14h |
/or1k/tags/nog_patch_44/insight/ |
| 1144 |
Speed up gdb when running with serial targets:
When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)
When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump. |
sfurman |
7768d 21h |
/or1k/tags/nog_patch_44/insight/ |
| 1142 |
Speed up gdb when running with serial targets:
When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)
When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump. |
sfurman |
7769d 11h |
/or1k/tags/nog_patch_44/insight/ |
| 1124 |
Initialize or1k_implementation with reasonable defaults for the number
of implementation registers. This doesn't affect the jtag or sim
targets at all because those values are always overwritten when
or1k_implementation is initialized. However, it is necessary when
connecting to remote gdb stubs through a serial port or socket, since
or1k_implementation is not yet initialized for those targets. |
sfurman |
7802d 14h |
/or1k/tags/nog_patch_44/insight/ |
| 1123 |
Renumber/rename SPRs to match latest architecture doc |
sfurman |
7803d 20h |
/or1k/tags/nog_patch_44/insight/ |
| 1115 |
Fix stack-walking code in or1k_frame_chain() and or1k_skip_prologue()
to expect the function prologue that or32 gcc currently emits, rather
than a previous incarnation of the or1k ABI. |
sfurman |
7825d 18h |
/or1k/tags/nog_patch_44/insight/ |
| 1114 |
Added cvs log keywords |
lampret |
7840d 14h |
/or1k/tags/nog_patch_44/insight/ |
| 1034 |
Fixed encoding for l.div/l.divu. |
lampret |
7982d 15h |
/or1k/tags/nog_patch_44/insight/ |
| 879 |
Initial version of OpenRISC Custom Unit Compiler added |
markom |
8048d 01h |
/or1k/tags/nog_patch_44/insight/ |
| 874 |
Command for displaying trace buffer added. |
simons |
8058d 01h |
/or1k/tags/nog_patch_44/insight/ |
| 801 |
l.muli instruction added |
markom |
8140d 04h |
/or1k/tags/nog_patch_44/insight/ |
| 722 |
floating point registers are obsolete; GPRs should be used instead |
markom |
8168d 04h |
/or1k/tags/nog_patch_44/insight/ |
| 720 |
single floating point support added |
markom |
8168d 08h |
/or1k/tags/nog_patch_44/insight/ |
| 717 |
some minor improvements |
markom |
8168d 10h |
/or1k/tags/nog_patch_44/insight/ |
