| Rev |
Log message |
Author |
Age |
Path |
| 1765 |
|
root |
5582d 17h |
/or1k/tags/nog_patch_47/or1ksim/cpu/or1k/ |
| 1419 |
This commit was manufactured by cvs2svn to create tag 'nog_patch_47'. |
|
7023d 00h |
/or1k/tags/nog_patch_47/or1ksim/cpu/or1k/ |
| 1404 |
Move the function of ic_clock() to mtspr() and remove it |
nogj |
7023d 00h |
/or1k/tags/nog_patch_47/or1ksim/cpu/or1k/ |
| 1402 |
Do what dc_clock() did in mtspr() and remove it |
nogj |
7023d 00h |
/or1k/tags/nog_patch_47/or1ksim/cpu/or1k/ |
| 1386 |
Rework exception handling |
nogj |
7029d 04h |
/or1k/tags/nog_patch_47/or1ksim/cpu/or1k/ |
| 1382 |
Nir Mor:
Implemented DCCFGR, ICCFGR, DMMUCFGR and IMMUCFGR spr registers. |
nogj |
7038d 04h |
/or1k/tags/nog_patch_47/or1ksim/cpu/or1k/ |
| 1376 |
aclocal && autoconf && automake |
phoenix |
7057d 04h |
/or1k/tags/nog_patch_47/or1ksim/cpu/or1k/ |
| 1354 |
typing fixes |
phoenix |
7072d 01h |
/or1k/tags/nog_patch_47/or1ksim/cpu/or1k/ |
| 1350 |
Mark a simulated cpu address as such, by introducing the new oraddr_t type |
nogj |
7072d 22h |
/or1k/tags/nog_patch_47/or1ksim/cpu/or1k/ |
| 1344 |
* Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes |
nogj |
7086d 02h |
/or1k/tags/nog_patch_47/or1ksim/cpu/or1k/ |
| 1342 |
* Fix generate.c to produce a execgen.c with less warnings.
* Fix the --enable-simple configure option. |
nogj |
7086d 02h |
/or1k/tags/nog_patch_47/or1ksim/cpu/or1k/ |
| 1341 |
Mark wich operand is the destination operand in the architechture definition |
nogj |
7086d 03h |
/or1k/tags/nog_patch_47/or1ksim/cpu/or1k/ |
| 1338 |
l.ff1 instruction added |
andreje |
7102d 00h |
/or1k/tags/nog_patch_47/or1ksim/cpu/or1k/ |
| 1319 |
cpu/sim memory accesses separation, tick, exception, nr. of operands, cycles count,... corrections. |
phoenix |
7189d 17h |
/or1k/tags/nog_patch_47/or1ksim/cpu/or1k/ |
| 1316 |
added a warning |
phoenix |
7207d 15h |
/or1k/tags/nog_patch_47/or1ksim/cpu/or1k/ |
| 1314 |
in some cases (cbasic test from orp for example) this caused problems, disable for now |
phoenix |
7207d 15h |
/or1k/tags/nog_patch_47/or1ksim/cpu/or1k/ |
| 1308 |
Gyorgy Jeney: extensive cleanup |
phoenix |
7277d 17h |
/or1k/tags/nog_patch_47/or1ksim/cpu/or1k/ |
| 1302 |
compile fix (remove const) |
phoenix |
7295d 15h |
/or1k/tags/nog_patch_47/or1ksim/cpu/or1k/ |
| 1263 |
simprintf now uses stack vargs -- same as printf |
markom |
7393d 07h |
/or1k/tags/nog_patch_47/or1ksim/cpu/or1k/ |
| 1256 |
page size is 8192 on or32 |
phoenix |
7433d 20h |
/or1k/tags/nog_patch_47/or1ksim/cpu/or1k/ |
| 1249 |
Downgrading back to automake-1.4 |
lampret |
7442d 17h |
/or1k/tags/nog_patch_47/or1ksim/cpu/or1k/ |
| 1244 |
Added "cm" command to copy data inside memory.
Make or1ksim work on little endian platforms.
Port to Mac OS X.
Some bugfixes.
Allow JTAG write access to read-only memory regions. |
hpanther |
7445d 01h |
/or1k/tags/nog_patch_47/or1ksim/cpu/or1k/ |
| 1203 |
value stored in ITLB and DTLB match registers was wrong. fixed. |
phoenix |
7529d 12h |
/or1k/tags/nog_patch_47/or1ksim/cpu/or1k/ |
| 1202 |
at exception print insn number to ease debugging |
phoenix |
7529d 13h |
/or1k/tags/nog_patch_47/or1ksim/cpu/or1k/ |
| 1169 |
Added support for l.addc instruction. |
csanchez |
7661d 20h |
/or1k/tags/nog_patch_47/or1ksim/cpu/or1k/ |
| 1117 |
Ignore generated files for CVS purposes |
sfurman |
7785d 17h |
/or1k/tags/nog_patch_47/or1ksim/cpu/or1k/ |
| 1106 |
Cache invalidate bug fixed again (it was ok before). |
simons |
7866d 00h |
/or1k/tags/nog_patch_47/or1ksim/cpu/or1k/ |
| 1097 |
Cache invalidate bug fixed. |
simons |
7872d 19h |
/or1k/tags/nog_patch_47/or1ksim/cpu/or1k/ |
| 1086 |
STACK_ARGS is getting obsolete and is only needed by simprintf, which needs it to be 0. |
lampret |
7879d 15h |
/or1k/tags/nog_patch_47/or1ksim/cpu/or1k/ |
| 1025 |
PRINTF/printf mess fixed. |
simons |
7961d 20h |
/or1k/tags/nog_patch_47/or1ksim/cpu/or1k/ |
