OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_49/] [or1ksim/] [support/] - Rev 1390

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
1390 * Change scheduler to count down to 0 instead of reaching a certain cycle
count.
* Change the SCHED_ADD interface to take a time out as the parameter instead of the number of cycles.		 nogj 7068d 02h /or1k/tags/nog_patch_49/or1ksim/support/
1389 Implement debug channels based on the wine debugging scheme nogj 7074d 06h /or1k/tags/nog_patch_49/or1ksim/support/
1376 aclocal && autoconf && automake phoenix 7102d 06h /or1k/tags/nog_patch_49/or1ksim/support/
1365 Pass a pointer as the user given argument in the schedular callback nogj 7108d 21h /or1k/tags/nog_patch_49/or1ksim/support/
1358 Modularise config file parseing. Paving the way for further modularisation. nogj 7108d 21h /or1k/tags/nog_patch_49/or1ksim/support/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7118d 00h /or1k/tags/nog_patch_49/or1ksim/support/
1344 * Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes nogj 7131d 04h /or1k/tags/nog_patch_49/or1ksim/support/
1319 cpu/sim memory accesses separation, tick, exception, nr. of operands, cycles count,... corrections. phoenix 7234d 19h /or1k/tags/nog_patch_49/or1ksim/support/
1315 missing declaration when defined STACK_ARGS phoenix 7252d 17h /or1k/tags/nog_patch_49/or1ksim/support/
1308 Gyorgy Jeney: extensive cleanup phoenix 7322d 19h /or1k/tags/nog_patch_49/or1ksim/support/
1265 simprintf now uses stack vargs -- same as printf markom 7438d 03h /or1k/tags/nog_patch_49/or1ksim/support/
1249 Downgrading back to automake-1.4 lampret 7487d 19h /or1k/tags/nog_patch_49/or1ksim/support/
1117 Ignore generated files for CVS purposes sfurman 7830d 19h /or1k/tags/nog_patch_49/or1ksim/support/
1095 eval_reg replaced with the new evalsim_reg32 lampret 7924d 14h /or1k/tags/nog_patch_49/or1ksim/support/
997 PRINTF should be used instead of printf; command redirection repaired markom 8019d 09h /or1k/tags/nog_patch_49/or1ksim/support/
970 Testbench is now running on ORP architecture platform. simons 8026d 20h /or1k/tags/nog_patch_49/or1ksim/support/
884 code cleaning - a lot of global variables moved to runtime struct markom 8063d 07h /or1k/tags/nog_patch_49/or1ksim/support/
876 Beta release of ATA simulation rherveille 8070d 19h /or1k/tags/nog_patch_49/or1ksim/support/
823 Added configuration parameter for specifying stdout file filename. ivang 8147d 04h /or1k/tags/nog_patch_49/or1ksim/support/
821 ugly bug with duplicate redefined i removed markom 8149d 04h /or1k/tags/nog_patch_49/or1ksim/support/
807 sched files moved to support dir markom 8154d 10h /or1k/tags/nog_patch_49/or1ksim/support/
704 exe_logs now print also l.nop 3 printfs markom 8196d 06h /or1k/tags/nog_patch_49/or1ksim/support/
547 memory profiler added markom 8245d 09h /or1k/tags/nog_patch_49/or1ksim/support/
532 removed stats 6 command, handling SLP; function profiling is supported by profiler; subroutine level parallelism is not covered yet, but should be done in profiler markom 8247d 09h /or1k/tags/nog_patch_49/or1ksim/support/
517 some performance optimizations markom 8250d 04h /or1k/tags/nog_patch_49/or1ksim/support/
515 uart test updated; simprintf updated markom 8250d 08h /or1k/tags/nog_patch_49/or1ksim/support/
500 Added .cvsignore files for annoying generated files erez 8252d 08h /or1k/tags/nog_patch_49/or1ksim/support/
494 trace.h removed; removed absolete trace_fd code - use exe_log instead markom 8264d 05h /or1k/tags/nog_patch_49/or1ksim/support/
344 added acv test for uart; sim debug now has verbose levels; lot of bugs fixed in uart model markom 8301d 06h /or1k/tags/nog_patch_49/or1ksim/support/
261 modified memory accesses; added cfg script; added pic test basic entry of vga; some extensions to mc markom 8313d 08h /or1k/tags/nog_patch_49/or1ksim/support/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.