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[/] [or1k/] [tags/] [nog_patch_50/] [or1ksim/] [mmu/] - Rev 1240

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Rev Log message Author Age Path
1240 additional functions to bypass cache and mmu needed for peripheral devices phoenix 7499d 10h /or1k/tags/nog_patch_50/or1ksim/mmu/
1174 fix for immu exceptions that never should have happened phoenix 7703d 15h /or1k/tags/nog_patch_50/or1ksim/mmu/
1117 Ignore generated files for CVS purposes sfurman 7835d 16h /or1k/tags/nog_patch_50/or1ksim/mmu/
1099 cvs bug fixed markom 7922d 03h /or1k/tags/nog_patch_50/or1ksim/mmu/
997 PRINTF should be used instead of printf; command redirection repaired markom 8024d 06h /or1k/tags/nog_patch_50/or1ksim/mmu/
970 Testbench is now running on ORP architecture platform. simons 8031d 17h /or1k/tags/nog_patch_50/or1ksim/mmu/
886 MMU registers reserved fields protected from writing. simons 8067d 22h /or1k/tags/nog_patch_50/or1ksim/mmu/
884 code cleaning - a lot of global variables moved to runtime struct markom 8068d 04h /or1k/tags/nog_patch_50/or1ksim/mmu/
876 Beta release of ATA simulation rherveille 8075d 16h /or1k/tags/nog_patch_50/or1ksim/mmu/
713 lot of small minor improvements: code documented, cleaned; runs at about same speed when not actually logging, but exe_log is enabled; raw_stats now run only with simple execution - enable RAW_USAGE_STATS macro markom 8196d 05h /or1k/tags/nog_patch_50/or1ksim/mmu/
638 TLBTR CI bit is now working properly. simons 8226d 18h /or1k/tags/nog_patch_50/or1ksim/mmu/
600 No more low/high priority interrupts (PICPR removed). Added tick timer exception. simons 8239d 16h /or1k/tags/nog_patch_50/or1ksim/mmu/
572 Some new bugs fixed. simons 8244d 17h /or1k/tags/nog_patch_50/or1ksim/mmu/
541 lot of new parameters concerning memory delays added; bpb parameter moved from cpu to new bpb section; UPDATE YOUR .CFG FILES! markom 8251d 02h /or1k/tags/nog_patch_50/or1ksim/mmu/
535 stats is updated; statical single stats removed; t command output cleaned, added time output; cycles is moved to instructions; cycles now count time markom 8252d 00h /or1k/tags/nog_patch_50/or1ksim/mmu/
517 some performance optimizations markom 8255d 01h /or1k/tags/nog_patch_50/or1ksim/mmu/
500 Added .cvsignore files for annoying generated files erez 8257d 04h /or1k/tags/nog_patch_50/or1ksim/mmu/
456 Page size bug fixed. simons 8275d 20h /or1k/tags/nog_patch_50/or1ksim/mmu/
446 ITLBMR register bit fields set in order. simons 8277d 06h /or1k/tags/nog_patch_50/or1ksim/mmu/
438 ITLB -> DTLB lapsus fixed. simons 8278d 01h /or1k/tags/nog_patch_50/or1ksim/mmu/
430 dpfault and ipfault exceptions implemented markom 8279d 00h /or1k/tags/nog_patch_50/or1ksim/mmu/
429 cache configuration added markom 8279d 00h /or1k/tags/nog_patch_50/or1ksim/mmu/
425 immu and dmmu configurations added markom 8279d 02h /or1k/tags/nog_patch_50/or1ksim/mmu/
416 IMMU bugs fixed. simons 8281d 15h /or1k/tags/nog_patch_50/or1ksim/mmu/
344 added acv test for uart; sim debug now has verbose levels; lot of bugs fixed in uart model markom 8306d 03h /or1k/tags/nog_patch_50/or1ksim/mmu/
221 major changes to testbench; debug unit is moved to /debug; memory organization can be customized; UART from simons; overall cleanup markom 8327d 04h /or1k/tags/nog_patch_50/or1ksim/mmu/
204 Added function prototypes to stop gcc from complaining erez 8361d 01h /or1k/tags/nog_patch_50/or1ksim/mmu/
167 - SPR values corrected
- testbenches now work
- lot of optimizations, use --disable-debugmod for optimal performance
- some tick timer bugs fixed		 markom 8404d 00h /or1k/tags/nog_patch_50/or1ksim/mmu/
102 Major update to include PM, PIC, Cache Mngmnt and non-interactive mode. lampret 8486d 10h /or1k/tags/nog_patch_50/or1ksim/mmu/
74 Same as DMMU. lampret 8693d 07h /or1k/tags/nog_patch_50/or1ksim/mmu/

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