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[/] [or1k/] [tags/] [nog_patch_52/] - Rev 803

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Rev Log message Author Age Path
803 Free irq handler fixed. simons 8189d 19h /or1k/tags/nog_patch_52/
802 Cache and tick timer tests fixed. simons 8191d 06h /or1k/tags/nog_patch_52/
801 l.muli instruction added markom 8193d 02h /or1k/tags/nog_patch_52/
800 Bug fixed. simons 8194d 00h /or1k/tags/nog_patch_52/
799 Wrapping around 512k boundary to simulate real hw. simons 8197d 17h /or1k/tags/nog_patch_52/
798 Hardware scroll added. This possible due to the fact that crt is wrapping around 512k boundary. simons 8197d 17h /or1k/tags/nog_patch_52/
797 Changed hardcoded address for fake MC to use a define. lampret 8197d 19h /or1k/tags/nog_patch_52/
796 Removed unused ports wb_clki and wb_rst_i lampret 8197d 19h /or1k/tags/nog_patch_52/
795 Added a directive to ignore signed division variables that are only used in simulation. lampret 8197d 23h /or1k/tags/nog_patch_52/
794 Added again just recently removed full_case directive lampret 8197d 23h /or1k/tags/nog_patch_52/
793 Added synthesis off/on for timescale.v included file. lampret 8197d 23h /or1k/tags/nog_patch_52/
792 Fixed port names that changed. lampret 8197d 23h /or1k/tags/nog_patch_52/
791 Fixed some ports in instnatiations that were removed from the modules lampret 8197d 23h /or1k/tags/nog_patch_52/
790 Changed comment about synopsys to _synopsys_ because synthesis was complaining about unknown directives lampret 8197d 23h /or1k/tags/nog_patch_52/
789 Added response from memory controller (addr 0x60000000) lampret 8198d 00h /or1k/tags/nog_patch_52/
788 Some of the warnings fixed. lampret 8198d 00h /or1k/tags/nog_patch_52/
787 Added romfs.tgz lampret 8198d 18h /or1k/tags/nog_patch_52/
786 Moved UCF constraint file to the backend directory. lampret 8198d 19h /or1k/tags/nog_patch_52/
785 Added XSV specific documentation. lampret 8198d 19h /or1k/tags/nog_patch_52/
784 Added soem missing files. lampret 8198d 19h /or1k/tags/nog_patch_52/
783 Added sim directory and sub files/dirs. lampret 8198d 19h /or1k/tags/nog_patch_52/
782 Added the old SW directory. It needs to be updated for the new ORP environment and test cases moved to sw directory. lampret 8198d 19h /or1k/tags/nog_patch_52/
781 Added design compiler scripts. However these are not ready for use yet .... They need to be updated for the ORP sources and ORP sources need to be updated as well. lampret 8198d 19h /or1k/tags/nog_patch_52/
780 Added libraries. lampret 8198d 19h /or1k/tags/nog_patch_52/
779 Added bench directory lampret 8198d 20h /or1k/tags/nog_patch_52/
778 Added second type of Virtual Silicon two-port SRAM (for register file). Changed defines for VS STP RAMs. lampret 8198d 20h /or1k/tags/nog_patch_52/
777 Changed define name from OR1200_MEM2REG_FAST to OR1200_IMPL_MEM2REG2 lampret 8198d 20h /or1k/tags/nog_patch_52/
776 Updated defines. lampret 8198d 20h /or1k/tags/nog_patch_52/
775 Optimized cache controller FSM. lampret 8198d 20h /or1k/tags/nog_patch_52/
774 Removed old files. lampret 8198d 21h /or1k/tags/nog_patch_52/

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