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1765 root 5679d 20h /or1k/tags/nog_patch_57/insight/
1439 This commit was manufactured by cvs2svn to create tag 'nog_patch_57'. 7120d 03h /or1k/tags/nog_patch_57/insight/
1384 Fix the parameters to the l.ff1/l.maci instructions nogj 7135d 06h /or1k/tags/nog_patch_57/insight/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7170d 01h /or1k/tags/nog_patch_57/insight/
1346 Remove the global op structure nogj 7183d 04h /or1k/tags/nog_patch_57/insight/
1344 * Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes nogj 7183d 05h /or1k/tags/nog_patch_57/insight/
1342 * Fix generate.c to produce a execgen.c with less warnings.
* Fix the --enable-simple configure option.
nogj 7183d 05h /or1k/tags/nog_patch_57/insight/
1341 Mark wich operand is the destination operand in the architechture definition nogj 7183d 05h /or1k/tags/nog_patch_57/insight/
1338 l.ff1 instruction added andreje 7199d 03h /or1k/tags/nog_patch_57/insight/
1333 gcc 3.4 compile fix phoenix 7214d 04h /or1k/tags/nog_patch_57/insight/
1309 removed includes phoenix 7371d 22h /or1k/tags/nog_patch_57/insight/
1308 Gyorgy Jeney: extensive cleanup phoenix 7374d 20h /or1k/tags/nog_patch_57/insight/
1295 Updated instruction set descriptions. Changed FP instructions encoding. lampret 7396d 20h /or1k/tags/nog_patch_57/insight/
1286 Changed desciption of the l.cust5 insns lampret 7445d 23h /or1k/tags/nog_patch_57/insight/
1285 Changed desciption of the l.cust5 insns lampret 7445d 23h /or1k/tags/nog_patch_57/insight/
1256 page size is 8192 on or32 phoenix 7530d 23h /or1k/tags/nog_patch_57/insight/
1169 Added support for l.addc instruction. csanchez 7758d 23h /or1k/tags/nog_patch_57/insight/
1152 *** empty log message *** phoenix 7839d 02h /or1k/tags/nog_patch_57/insight/
1149 *** empty log message *** phoenix 7839d 15h /or1k/tags/nog_patch_57/insight/
1144 Speed up gdb when running with serial targets:

When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)

When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump.
sfurman 7841d 22h /or1k/tags/nog_patch_57/insight/
1142 Speed up gdb when running with serial targets:

When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)

When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump.
sfurman 7842d 13h /or1k/tags/nog_patch_57/insight/
1124 Initialize or1k_implementation with reasonable defaults for the number
of implementation registers. This doesn't affect the jtag or sim
targets at all because those values are always overwritten when
or1k_implementation is initialized. However, it is necessary when
connecting to remote gdb stubs through a serial port or socket, since
or1k_implementation is not yet initialized for those targets.
sfurman 7875d 15h /or1k/tags/nog_patch_57/insight/
1123 Renumber/rename SPRs to match latest architecture doc sfurman 7876d 21h /or1k/tags/nog_patch_57/insight/
1115 Fix stack-walking code in or1k_frame_chain() and or1k_skip_prologue()
to expect the function prologue that or32 gcc currently emits, rather
than a previous incarnation of the or1k ABI.
sfurman 7898d 19h /or1k/tags/nog_patch_57/insight/
1114 Added cvs log keywords lampret 7913d 15h /or1k/tags/nog_patch_57/insight/
1034 Fixed encoding for l.div/l.divu. lampret 8055d 16h /or1k/tags/nog_patch_57/insight/
879 Initial version of OpenRISC Custom Unit Compiler added markom 8121d 02h /or1k/tags/nog_patch_57/insight/
874 Command for displaying trace buffer added. simons 8131d 03h /or1k/tags/nog_patch_57/insight/
801 l.muli instruction added markom 8213d 06h /or1k/tags/nog_patch_57/insight/
722 floating point registers are obsolete; GPRs should be used instead markom 8241d 05h /or1k/tags/nog_patch_57/insight/

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