OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_62/] - Rev 25

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
25 Bug fix in handling labels when loading code into simulator memory. lampret 8834d 18h /or1k/tags/nog_patch_62/
24 Static branch prediction added. lampret 8834d 18h /or1k/tags/nog_patch_62/
23 Common OR1K backend for OR32 and OR16. lampret 8834d 18h /or1k/tags/nog_patch_62/
22 More modifications related to or16. lampret 8837d 00h /or1k/tags/nog_patch_62/
21 More modifications related to or16. cmchen 8837d 00h /or1k/tags/nog_patch_62/
20 or1k renamed to or32. lampret 8837d 13h /or1k/tags/nog_patch_62/
19 Added or16, or1k renamed to or32. lampret 8837d 13h /or1k/tags/nog_patch_62/
18 or16 added, or1k renamed to or32. lampret 8837d 13h /or1k/tags/nog_patch_62/
17 Re-generated. jrydberg 8860d 10h /or1k/tags/nog_patch_62/
16 Add support for systems without readline. To use GNU readline library,
use the `--enable-readline' option to the configure script.		 jrydberg 8860d 10h /or1k/tags/nog_patch_62/
15 Initial revision. jrydberg 8897d 00h /or1k/tags/nog_patch_62/
14 First import. lampret 8897d 03h /or1k/tags/nog_patch_62/
13 Rebuild of the generated files. jrydberg 8898d 05h /or1k/tags/nog_patch_62/
12 Added information to the section about how to configure and compile
the package.		 jrydberg 8898d 05h /or1k/tags/nog_patch_62/
11 Rebuild from configure.in. jrydberg 8898d 05h /or1k/tags/nog_patch_62/
10 Support for both architectures. Specify architecture with the
--target option.		 jrydberg 8898d 05h /or1k/tags/nog_patch_62/
9 Added support for OpenRISC 100 and DLX. jrydberg 8898d 05h /or1k/tags/nog_patch_62/
8 Initial revision. jrydberg 8898d 05h /or1k/tags/nog_patch_62/
7 Major update of the enviorment. Now uses autoconf and automake. The
simulator uses readline aswell to get input from the user. A number of
new files added, some modified. The libc directory is now called support.		 jrydberg 8898d 06h /or1k/tags/nog_patch_62/
6 Just a regular update with exception of cache simulation. MMU simulation still under development. lampret 8899d 00h /or1k/tags/nog_patch_62/
5 Data and instruction cache simulation added. lampret 8899d 00h /or1k/tags/nog_patch_62/
4 no message lampret 8949d 04h /or1k/tags/nog_patch_62/
3 This commit was generated by cvs2svn to compensate for changes in r2, which
included commits to RCS files with non-trunk default branches.		 cvs 9024d 17h /or1k/tags/nog_patch_62/
1 Standard project directories initialized by cvs2svn. 9024d 17h /or1k/tags/nog_patch_62/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.