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[/] [or1k/] [tags/] [nog_patch_62/] [or1ksim/] [cpu/] - Rev 36

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36 Fixed bug when loading "data" from .text segment (all insns are not only
decoded but also placed in simulator memory undecoded as data).		 lampret 8863d 12h /or1k/tags/nog_patch_62/or1ksim/cpu/
35 SLP hooks. lampret 8863d 12h /or1k/tags/nog_patch_62/or1ksim/cpu/
34 Started with SLP (not finished yet). lampret 8863d 12h /or1k/tags/nog_patch_62/or1ksim/cpu/
33 Handling of or1k exceptions. lampret 8867d 11h /or1k/tags/nog_patch_62/or1ksim/cpu/
32 Interrupt recognition. lampret 8867d 11h /or1k/tags/nog_patch_62/or1ksim/cpu/
30 Updated SPRs, exceptions. Added 16450 device. lampret 8867d 14h /or1k/tags/nog_patch_62/or1ksim/cpu/
29 Adding OR16/OR32 insn decoder. lampret 8882d 11h /or1k/tags/nog_patch_62/or1ksim/cpu/
28 Adding COFF loader. lampret 8882d 11h /or1k/tags/nog_patch_62/or1ksim/cpu/
26 Clean up. lampret 8898d 09h /or1k/tags/nog_patch_62/or1ksim/cpu/
25 Bug fix in handling labels when loading code into simulator memory. lampret 8898d 09h /or1k/tags/nog_patch_62/or1ksim/cpu/
24 Static branch prediction added. lampret 8898d 09h /or1k/tags/nog_patch_62/or1ksim/cpu/
23 Common OR1K backend for OR32 and OR16. lampret 8898d 09h /or1k/tags/nog_patch_62/or1ksim/cpu/
22 More modifications related to or16. lampret 8900d 15h /or1k/tags/nog_patch_62/or1ksim/cpu/
20 or1k renamed to or32. lampret 8901d 04h /or1k/tags/nog_patch_62/or1ksim/cpu/
19 Added or16, or1k renamed to or32. lampret 8901d 04h /or1k/tags/nog_patch_62/or1ksim/cpu/
18 or16 added, or1k renamed to or32. lampret 8901d 04h /or1k/tags/nog_patch_62/or1ksim/cpu/
13 Rebuild of the generated files. jrydberg 8961d 20h /or1k/tags/nog_patch_62/or1ksim/cpu/
8 Initial revision. jrydberg 8961d 21h /or1k/tags/nog_patch_62/or1ksim/cpu/
7 Major update of the enviorment. Now uses autoconf and automake. The
simulator uses readline aswell to get input from the user. A number of
new files added, some modified. The libc directory is now called support.		 jrydberg 8961d 21h /or1k/tags/nog_patch_62/or1ksim/cpu/
6 Just a regular update with exception of cache simulation. MMU simulation still under development. lampret 8962d 15h /or1k/tags/nog_patch_62/or1ksim/cpu/
3 This commit was generated by cvs2svn to compensate for changes in r2, which
included commits to RCS files with non-trunk default branches.		 cvs 9088d 08h /or1k/tags/nog_patch_62/or1ksim/cpu/

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