OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_65/] [gen_or1k_isa/] [sources/] [opcode/] - Rev 1765

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
1765 root 5621d 14h /or1k/tags/nog_patch_65/gen_or1k_isa/sources/opcode/
1456 This commit was manufactured by cvs2svn to create tag 'nog_patch_65'. 7061d 21h /or1k/tags/nog_patch_65/gen_or1k_isa/sources/opcode/
1452 Implement a dynamic recompiler to speed up the execution nogj 7061d 21h /or1k/tags/nog_patch_65/gen_or1k_isa/sources/opcode/
1440 Reclasify l.trap and l.sys to be an exception instruction nogj 7061d 21h /or1k/tags/nog_patch_65/gen_or1k_isa/sources/opcode/
1384 Fix the parameters to the l.ff1/l.maci instructions nogj 7077d 01h /or1k/tags/nog_patch_65/gen_or1k_isa/sources/opcode/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7111d 20h /or1k/tags/nog_patch_65/gen_or1k_isa/sources/opcode/
1346 Remove the global op structure nogj 7124d 23h /or1k/tags/nog_patch_65/gen_or1k_isa/sources/opcode/
1342 * Fix generate.c to produce a execgen.c with less warnings.
* Fix the --enable-simple configure option.
nogj 7125d 00h /or1k/tags/nog_patch_65/gen_or1k_isa/sources/opcode/
1341 Mark wich operand is the destination operand in the architechture definition nogj 7125d 00h /or1k/tags/nog_patch_65/gen_or1k_isa/sources/opcode/
1338 l.ff1 instruction added andreje 7140d 22h /or1k/tags/nog_patch_65/gen_or1k_isa/sources/opcode/
1309 removed includes phoenix 7313d 17h /or1k/tags/nog_patch_65/gen_or1k_isa/sources/opcode/
1308 Gyorgy Jeney: extensive cleanup phoenix 7316d 14h /or1k/tags/nog_patch_65/gen_or1k_isa/sources/opcode/
1295 Updated instruction set descriptions. Changed FP instructions encoding. lampret 7338d 14h /or1k/tags/nog_patch_65/gen_or1k_isa/sources/opcode/
1286 Changed desciption of the l.cust5 insns lampret 7387d 17h /or1k/tags/nog_patch_65/gen_or1k_isa/sources/opcode/
1285 Changed desciption of the l.cust5 insns lampret 7387d 17h /or1k/tags/nog_patch_65/gen_or1k_isa/sources/opcode/
1169 Added support for l.addc instruction. csanchez 7700d 18h /or1k/tags/nog_patch_65/gen_or1k_isa/sources/opcode/
1114 Added cvs log keywords lampret 7855d 09h /or1k/tags/nog_patch_65/gen_or1k_isa/sources/opcode/
1034 Fixed encoding for l.div/l.divu. lampret 7997d 11h /or1k/tags/nog_patch_65/gen_or1k_isa/sources/opcode/
879 Initial version of OpenRISC Custom Unit Compiler added markom 8062d 21h /or1k/tags/nog_patch_65/gen_or1k_isa/sources/opcode/
801 l.muli instruction added markom 8155d 00h /or1k/tags/nog_patch_65/gen_or1k_isa/sources/opcode/
722 floating point registers are obsolete; GPRs should be used instead markom 8183d 00h /or1k/tags/nog_patch_65/gen_or1k_isa/sources/opcode/
720 single floating point support added markom 8183d 04h /or1k/tags/nog_patch_65/gen_or1k_isa/sources/opcode/
717 some minor improvements markom 8183d 05h /or1k/tags/nog_patch_65/gen_or1k_isa/sources/opcode/
714 do_stats introduced for faster no-stats execution markom 8185d 01h /or1k/tags/nog_patch_65/gen_or1k_isa/sources/opcode/
709 eval_operands is now being generated markom 8188d 07h /or1k/tags/nog_patch_65/gen_or1k_isa/sources/opcode/
706 insn_decode execution part replaced by generated function decode_execute; use --enable-simple to use runtime decoding markom 8188d 23h /or1k/tags/nog_patch_65/gen_or1k_isa/sources/opcode/
703 small optimizations to dissasemble markom 8190d 04h /or1k/tags/nog_patch_65/gen_or1k_isa/sources/opcode/
676 update of shared files markom 8202d 00h /or1k/tags/nog_patch_65/gen_or1k_isa/sources/opcode/
671 wrong version was restored markom 8202d 04h /or1k/tags/nog_patch_65/gen_or1k_isa/sources/opcode/
662 GNU binutils merge. ivang 8206d 02h /or1k/tags/nog_patch_65/gen_or1k_isa/sources/opcode/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.