OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_70/] [or1ksim/] [cpu/] [or32/] - Rev 1782

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
1765 root 5596d 03h /or1k/tags/nog_patch_70/or1ksim/cpu/or32/
1466 This commit was manufactured by cvs2svn to create tag 'nog_patch_70'. 7036d 09h /or1k/tags/nog_patch_70/or1ksim/cpu/or32/
1452 Implement a dynamic recompiler to speed up the execution nogj 7036d 09h /or1k/tags/nog_patch_70/or1ksim/cpu/or32/
1446 Cosmetic fixes nogj 7036d 09h /or1k/tags/nog_patch_70/or1ksim/cpu/or32/
1444 Move the definitions needed for the simple execution model out of or32.h and into simpl32_defs.h nogj 7036d 09h /or1k/tags/nog_patch_70/or1ksim/cpu/or32/
1442 Replace some problematic calles to mfspr/mtspr with direct access to the spr nogj 7036d 09h /or1k/tags/nog_patch_70/or1ksim/cpu/or32/
1440 Reclasify l.trap and l.sys to be an exception instruction nogj 7036d 09h /or1k/tags/nog_patch_70/or1ksim/cpu/or32/
1438 NOP_REPORT should report numbers in hex not decimal nogj 7036d 09h /or1k/tags/nog_patch_70/or1ksim/cpu/or32/
1432 Collect most of the cpu state variables in a structure (cpu_state) nogj 7036d 09h /or1k/tags/nog_patch_70/or1ksim/cpu/or32/
1430 Log SPR_SR in the execution log nogj 7036d 09h /or1k/tags/nog_patch_70/or1ksim/cpu/or32/
1428 Remove useless indirection: check_depend()->depend_operands() nogj 7036d 09h /or1k/tags/nog_patch_70/or1ksim/cpu/or32/
1386 Rework exception handling nogj 7042d 13h /or1k/tags/nog_patch_70/or1ksim/cpu/or32/
1384 Fix the parameters to the l.ff1/l.maci instructions nogj 7051d 13h /or1k/tags/nog_patch_70/or1ksim/cpu/or32/
1376 aclocal && autoconf && automake phoenix 7070d 13h /or1k/tags/nog_patch_70/or1ksim/cpu/or32/
1375 Remove FAST_SIM, it nolonger provides a speed up nogj 7077d 04h /or1k/tags/nog_patch_70/or1ksim/cpu/or32/
1352 Optimise execution history tracking nogj 7086d 07h /or1k/tags/nog_patch_70/or1ksim/cpu/or32/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7086d 08h /or1k/tags/nog_patch_70/or1ksim/cpu/or32/
1346 Remove the global op structure nogj 7099d 11h /or1k/tags/nog_patch_70/or1ksim/cpu/or32/
1345 Fix out-of-tree builds nogj 7099d 11h /or1k/tags/nog_patch_70/or1ksim/cpu/or32/
1344 * Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes nogj 7099d 11h /or1k/tags/nog_patch_70/or1ksim/cpu/or32/
1343 * Fix warnings in insnset.c and execute.c nogj 7099d 12h /or1k/tags/nog_patch_70/or1ksim/cpu/or32/
1342 * Fix generate.c to produce a execgen.c with less warnings.
* Fix the --enable-simple configure option.		 nogj 7099d 12h /or1k/tags/nog_patch_70/or1ksim/cpu/or32/
1341 Mark wich operand is the destination operand in the architechture definition nogj 7099d 12h /or1k/tags/nog_patch_70/or1ksim/cpu/or32/
1338 l.ff1 instruction added andreje 7115d 10h /or1k/tags/nog_patch_70/or1ksim/cpu/or32/
1321 some tests rely on exit(0) as a last std output text to pass phoenix 7201d 02h /or1k/tags/nog_patch_70/or1ksim/cpu/or32/
1319 cpu/sim memory accesses separation, tick, exception, nr. of operands, cycles count,... corrections. phoenix 7203d 02h /or1k/tags/nog_patch_70/or1ksim/cpu/or32/
1309 removed includes phoenix 7288d 05h /or1k/tags/nog_patch_70/or1ksim/cpu/or32/
1308 Gyorgy Jeney: extensive cleanup phoenix 7291d 02h /or1k/tags/nog_patch_70/or1ksim/cpu/or32/
1303 compile fix regarding lf.itof.s, lf.itof.d phoenix 7308d 14h /or1k/tags/nog_patch_70/or1ksim/cpu/or32/
1295 Updated instruction set descriptions. Changed FP instructions encoding. lampret 7313d 02h /or1k/tags/nog_patch_70/or1ksim/cpu/or32/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.