| Rev |
Log message |
Author |
Age |
Path |
| 1765 |
|
root |
5602d 00h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1749 |
This commit was manufactured by cvs2svn to create tag 'rel-0-3-0-rc1'. |
|
5751d 05h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1748 |
These are all the changes for Or1ksim 0.3.0 release candidate 1. The changes
are explained in the NEWS, README and ChangeLog files. A number of
long-standing bugs are fixed (see the OpenRISC tracker), and the code is
brought up to a consistent standard, following the GNU coding conventions
throughout.
Argument parsing now uses argtable2, and a User Guide has been added.
Documentation throughout has been extended to be compatible with Doxygen,
providing a further level of technical detail on the internals. |
jeremybennett |
5751d 05h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1745 |
These are the changes to allow or1ksim to build as a library as well as a standalone simulator. The concept of a "generic" peripheral is added, which will commuicate with an external model via upcalls. |
jeremybennett |
5787d 05h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1743 |
Changes to bring behavior into line with the current OpenRISC 1000 specification and support GDB 6.8. A couple of small bugs with handling xterms and opening the remote debug channel are also fixed. Header files have been added to sources in Makefile.am files where they are missing, so that "make tags" will include them. Makefile.in files have been regenerated due to these changes. |
jeremybennett |
5788d 04h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1731 |
Move ic configuration out of the global config struct. Register ic callbacks
instead of haveing static calls to the functions. |
nogj |
6746d 15h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1730 |
Avoid array lookups as far as possible. Precalculate as much as possible.
Increases performance when running with ic. |
nogj |
6746d 15h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1649 |
Mark as many functions as possible static |
nogj |
6748d 04h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1576 |
configure updates |
phoenix |
6861d 00h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1557 |
Fix most warnings issued by gcc4 |
nogj |
6884d 14h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1555 |
* Moved log2_int() from cuc/cuc.c as it is usefull for other things aswell.
* Changed code to use log2_int() instead of log2(), which is also a builtin
library function (fixes compile on gcc4).
* Moved is_power2() from sim-config.c to misc.c. |
nogj |
6884d 14h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1506 |
* Remove very slow {set,test}sprbit{,s} functions.
* Remove uses of getsprbits in time critical functions. |
nogj |
6951d 11h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1486 |
* Seporate out the code used for handling the memory peripheral to peripheral/memory.c
* Mostly decouple the memory controller from the internals of the memory handling.
* Rewrite memory handling to be more linear and thus much faster.
* Issue a bus error on read/write with invalid granularity. |
nogj |
6994d 12h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1432 |
Collect most of the cpu state variables in a structure (cpu_state) |
nogj |
7042d 07h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1406 |
Fix the declaration of `sec' in reg_ic_sec |
nogj |
7042d 07h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1404 |
Move the function of ic_clock() to mtspr() and remove it |
nogj |
7042d 07h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1402 |
Do what dc_clock() did in mtspr() and remove it |
nogj |
7042d 07h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1386 |
Rework exception handling |
nogj |
7048d 11h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1382 |
Nir Mor:
Implemented DCCFGR, ICCFGR, DMMUCFGR and IMMUCFGR spr registers. |
nogj |
7057d 11h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1376 |
aclocal && autoconf && automake |
phoenix |
7076d 11h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1358 |
Modularise config file parseing. Paving the way for further modularisation. |
nogj |
7083d 02h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1350 |
Mark a simulated cpu address as such, by introducing the new oraddr_t type |
nogj |
7092d 05h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1344 |
* Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes |
nogj |
7105d 09h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1308 |
Gyorgy Jeney: extensive cleanup |
phoenix |
7297d 00h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1249 |
Downgrading back to automake-1.4 |
lampret |
7462d 00h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1117 |
Ignore generated files for CVS purposes |
sfurman |
7805d 00h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1099 |
cvs bug fixed |
markom |
7891d 11h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1085 |
Bug fixed. |
simons |
7904d 01h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 997 |
PRINTF should be used instead of printf; command redirection repaired |
markom |
7993d 14h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 992 |
A bug when cache enabled and bus error comes fixed. |
simons |
7995d 06h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
