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[/] [or1k/] [tags/] [rel-0-3-0-rc2/] - Rev 1636

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Rev Log message Author Age Path
1636 removed useless .orig file phoenix 6798d 18h /or1k/tags/rel-0-3-0-rc2/
1635 First Import of RC20x uClinux jcastillo 6809d 21h /or1k/tags/rel-0-3-0-rc2/
1634 First Import of RC20x uClinux jcastillo 6809d 22h /or1k/tags/rel-0-3-0-rc2/
1633 First Import of RC20x uClinux jcastillo 6809d 22h /or1k/tags/rel-0-3-0-rc2/
1632 First Import of RC20x uClinux jcastillo 6809d 22h /or1k/tags/rel-0-3-0-rc2/
1631 First Import jcastillo 6809d 22h /or1k/tags/rel-0-3-0-rc2/
1630 *** empty log message *** jcastillo 6809d 22h /or1k/tags/rel-0-3-0-rc2/
1629 First Import of uClinux for RC20x board jcastillo 6809d 23h /or1k/tags/rel-0-3-0-rc2/
1628 First Import of uClinux for RC20x board jcastillo 6809d 23h /or1k/tags/rel-0-3-0-rc2/
1627 First Import of RC20x uClinux jcastillo 6809d 23h /or1k/tags/rel-0-3-0-rc2/
1626 First Import of uClinux for RC20x board jcastillo 6809d 23h /or1k/tags/rel-0-3-0-rc2/
1625 First Import of uClinux for RC20x board jcastillo 6809d 23h /or1k/tags/rel-0-3-0-rc2/
1624 First Import of uClinux for RC20x board jcastillo 6810d 00h /or1k/tags/rel-0-3-0-rc2/
1623 First Import of uClinux for RC20x board jcastillo 6810d 00h /or1k/tags/rel-0-3-0-rc2/
1622 First Import of uClinux for RC20x board jcastillo 6810d 00h /or1k/tags/rel-0-3-0-rc2/
1621 First Impot jcastillo 6810d 01h /or1k/tags/rel-0-3-0-rc2/
1620 Added SMC91C111 LAN Chip Interruption to work with uClinux jcastillo 6814d 21h /or1k/tags/rel-0-3-0-rc2/
1619 Fixed types in function declaration jcastillo 6815d 02h /or1k/tags/rel-0-3-0-rc2/
1618 Import of or32 sepcific part of binutils port updated by Balint and Nog phoenix 6815d 08h /or1k/tags/rel-0-3-0-rc2/
1617 *** empty log message *** phoenix 6815d 08h /or1k/tags/rel-0-3-0-rc2/
1616 Import of or32 sepcific part of binutils port updated by Balint and Nog phoenix 6815d 08h /or1k/tags/rel-0-3-0-rc2/
1615 *** empty log message *** phoenix 6815d 09h /or1k/tags/rel-0-3-0-rc2/
1614 CI should not be set in dMMU translation tables or one gets different behaviour with dMMU on or off in case data cache is enabled. care should be taken for addresses higher than 0x7fff_ffff where the situation is just reversed. (since or1200 does not cache upper half of address space if there is no dMMU) phoenix 6825d 09h /or1k/tags/rel-0-3-0-rc2/
1613 change default phoenix 6830d 18h /or1k/tags/rel-0-3-0-rc2/
1612 major optimizations for or32 target phoenix 6830d 19h /or1k/tags/rel-0-3-0-rc2/
1610 Update ChangeLog nogj 6833d 20h /or1k/tags/rel-0-3-0-rc2/
1609 0.2.0-rc2 release nogj 6833d 21h /or1k/tags/rel-0-3-0-rc2/
1608 Avoid scheduleing too many jobs, potentially underflowing the scheduler stack nogj 6834d 15h /or1k/tags/rel-0-3-0-rc2/
1607 Don't drop cycles from the scheduler nogj 6834d 15h /or1k/tags/rel-0-3-0-rc2/
1606 fix uninitialized reads phoenix 6834d 20h /or1k/tags/rel-0-3-0-rc2/

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