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[/] [or1k/] [tags/] [rel-0-3-0-rc2/] - Rev 220

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Rev Log message Author Age Path
220 Fixed parameters in generic sprams. lampret 8301d 20h /or1k/tags/rel-0-3-0-rc2/
219 Fixed sensitivity list. lampret 8302d 22h /or1k/tags/rel-0-3-0-rc2/
218 Removed params from generic_XX.v. Added translate_off/on in sprs.v and id.v. Removed spr_addr from dc.v and ic.v. Fixed CR+LF. lampret 8302d 22h /or1k/tags/rel-0-3-0-rc2/
217 Fixed some synthesis warnings. Configured with caches and MMUs. lampret 8304d 16h /or1k/tags/rel-0-3-0-rc2/
216 No longer needed. lampret 8310d 03h /or1k/tags/rel-0-3-0-rc2/
215 MP3 version. lampret 8310d 03h /or1k/tags/rel-0-3-0-rc2/
214 Removed redundant "long long" checks erez 8320d 05h /or1k/tags/rel-0-3-0-rc2/
213 Added test5 for DMA erez 8320d 05h /or1k/tags/rel-0-3-0-rc2/
212 Added DMA erez 8320d 05h /or1k/tags/rel-0-3-0-rc2/
211 Added check for "long long" erez 8320d 06h /or1k/tags/rel-0-3-0-rc2/
210 Updated debug. More cleanup. Added MAC. lampret 8323d 11h /or1k/tags/rel-0-3-0-rc2/
209 Update debug. lampret 8325d 16h /or1k/tags/rel-0-3-0-rc2/
208 Initial checkin with working port to or1k chris 8327d 04h /or1k/tags/rel-0-3-0-rc2/
207 Several major changes to allow gdb to work with an Or1k implementation
that does not need a writeable PC. This version will use the breakpoint
vector and install a new vector into the EPC register, and then single
step out of the breakpoint exception. The breakpoint exception vector
must include only 2 commands: l.rfe and l.nop. Anything else and this
gdb version will fail w/ or1ksim.		 chris 8327d 07h /or1k/tags/rel-0-3-0-rc2/
206 Several modifications to support gdb in a new exception style mode.
This new version works with gdb, and does not require the simulator
to implement a writeable PC.		 chris 8327d 08h /or1k/tags/rel-0-3-0-rc2/
205 Adding debug capabilities. Half done. lampret 8331d 11h /or1k/tags/rel-0-3-0-rc2/
204 Added function prototypes to stop gcc from complaining erez 8334d 03h /or1k/tags/rel-0-3-0-rc2/
203 Updated from xess branch. lampret 8335d 16h /or1k/tags/rel-0-3-0-rc2/
202 changed configure.in and acconfig.h to check for long long
reran autoheader & autoconf		 erez 8340d 23h /or1k/tags/rel-0-3-0-rc2/
201 readfunc() and writefunc() now use unsigned long values instead of unsigned char. erez 8341d 00h /or1k/tags/rel-0-3-0-rc2/
200 Initial import simons 8344d 07h /or1k/tags/rel-0-3-0-rc2/
199 Initial import simons 8344d 08h /or1k/tags/rel-0-3-0-rc2/
198 Moved from testbench.old simons 8346d 19h /or1k/tags/rel-0-3-0-rc2/
197 This is not used any more. simons 8346d 19h /or1k/tags/rel-0-3-0-rc2/
196 Configuration SPRs added. simons 8346d 19h /or1k/tags/rel-0-3-0-rc2/
195 New test added. simons 8346d 19h /or1k/tags/rel-0-3-0-rc2/
194 Fixed a bug for little endian architectures. Could cause a hang of
gdb under some circumstances.		 chris 8347d 03h /or1k/tags/rel-0-3-0-rc2/
193 Declared RISCOP.RESET to be volatile so that -O2 optimization would
not optimize away the correct behavior by trying to be too clever.		 chris 8347d 04h /or1k/tags/rel-0-3-0-rc2/
192 Removed GlobalMode reference causing problems for --disable-debugmod
option.		 chris 8347d 13h /or1k/tags/rel-0-3-0-rc2/
191 Added UART jitter var to sim config chris 8348d 09h /or1k/tags/rel-0-3-0-rc2/

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