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[/] [or1k/] [tags/] [rel-0-3-0-rc2/] - Rev 27

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27 Updated. lampret 8832d 03h /or1k/tags/rel-0-3-0-rc2/
26 Clean up. lampret 8832d 20h /or1k/tags/rel-0-3-0-rc2/
25 Bug fix in handling labels when loading code into simulator memory. lampret 8832d 20h /or1k/tags/rel-0-3-0-rc2/
24 Static branch prediction added. lampret 8832d 20h /or1k/tags/rel-0-3-0-rc2/
23 Common OR1K backend for OR32 and OR16. lampret 8832d 21h /or1k/tags/rel-0-3-0-rc2/
22 More modifications related to or16. lampret 8835d 03h /or1k/tags/rel-0-3-0-rc2/
21 More modifications related to or16. cmchen 8835d 03h /or1k/tags/rel-0-3-0-rc2/
20 or1k renamed to or32. lampret 8835d 16h /or1k/tags/rel-0-3-0-rc2/
19 Added or16, or1k renamed to or32. lampret 8835d 16h /or1k/tags/rel-0-3-0-rc2/
18 or16 added, or1k renamed to or32. lampret 8835d 16h /or1k/tags/rel-0-3-0-rc2/
17 Re-generated. jrydberg 8858d 13h /or1k/tags/rel-0-3-0-rc2/
16 Add support for systems without readline. To use GNU readline library,
use the `--enable-readline' option to the configure script.		 jrydberg 8858d 13h /or1k/tags/rel-0-3-0-rc2/
15 Initial revision. jrydberg 8895d 03h /or1k/tags/rel-0-3-0-rc2/
14 First import. lampret 8895d 06h /or1k/tags/rel-0-3-0-rc2/
13 Rebuild of the generated files. jrydberg 8896d 08h /or1k/tags/rel-0-3-0-rc2/
12 Added information to the section about how to configure and compile
the package.		 jrydberg 8896d 08h /or1k/tags/rel-0-3-0-rc2/
11 Rebuild from configure.in. jrydberg 8896d 08h /or1k/tags/rel-0-3-0-rc2/
10 Support for both architectures. Specify architecture with the
--target option.		 jrydberg 8896d 08h /or1k/tags/rel-0-3-0-rc2/
9 Added support for OpenRISC 100 and DLX. jrydberg 8896d 08h /or1k/tags/rel-0-3-0-rc2/
8 Initial revision. jrydberg 8896d 08h /or1k/tags/rel-0-3-0-rc2/
7 Major update of the enviorment. Now uses autoconf and automake. The
simulator uses readline aswell to get input from the user. A number of
new files added, some modified. The libc directory is now called support.		 jrydberg 8896d 09h /or1k/tags/rel-0-3-0-rc2/
6 Just a regular update with exception of cache simulation. MMU simulation still under development. lampret 8897d 03h /or1k/tags/rel-0-3-0-rc2/
5 Data and instruction cache simulation added. lampret 8897d 03h /or1k/tags/rel-0-3-0-rc2/
4 no message lampret 8947d 07h /or1k/tags/rel-0-3-0-rc2/
3 This commit was generated by cvs2svn to compensate for changes in r2, which
included commits to RCS files with non-trunk default branches.		 cvs 9022d 20h /or1k/tags/rel-0-3-0-rc2/
1 Standard project directories initialized by cvs2svn. 9022d 20h /or1k/tags/rel-0-3-0-rc2/

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