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Author |
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1765 |
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root |
5566d 18h |
/or1k/tags/rel-0-3-0-rc2/gdb-5.0/ |
1753 |
This commit was manufactured by cvs2svn to create tag 'rel-0-3-0-rc2'. |
|
5686d 01h |
/or1k/tags/rel-0-3-0-rc2/gdb-5.0/ |
1751 |
These are the changes to support Or1ksim 0.3.0rc2. Most significantly they provide GDB RSP support. They also fix 5 outstanding bugs and satisfy one new feature request. |
jeremybennett |
5686d 03h |
/or1k/tags/rel-0-3-0-rc2/gdb-5.0/ |
1748 |
These are all the changes for Or1ksim 0.3.0 release candidate 1. The changes
are explained in the NEWS, README and ChangeLog files. A number of
long-standing bugs are fixed (see the OpenRISC tracker), and the code is
brought up to a consistent standard, following the GNU coding conventions
throughout.
Argument parsing now uses argtable2, and a User Guide has been added.
Documentation throughout has been extended to be compatible with Doxygen,
providing a further level of technical detail on the internals. |
jeremybennett |
5715d 23h |
/or1k/tags/rel-0-3-0-rc2/gdb-5.0/ |
1656 |
Pass the instruction operands as part of the op_queue structure. |
nogj |
6712d 21h |
/or1k/tags/rel-0-3-0-rc2/gdb-5.0/ |
1552 |
Update most config.guess and config.sub scripts. |
robertmh |
6894d 21h |
/or1k/tags/rel-0-3-0-rc2/gdb-5.0/ |
1452 |
Implement a dynamic recompiler to speed up the execution |
nogj |
7007d 01h |
/or1k/tags/rel-0-3-0-rc2/gdb-5.0/ |
1444 |
Move the definitions needed for the simple execution model out of or32.h and into simpl32_defs.h |
nogj |
7007d 01h |
/or1k/tags/rel-0-3-0-rc2/gdb-5.0/ |
1344 |
* Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes |
nogj |
7070d 03h |
/or1k/tags/rel-0-3-0-rc2/gdb-5.0/ |
1342 |
* Fix generate.c to produce a execgen.c with less warnings.
* Fix the --enable-simple configure option. |
nogj |
7070d 03h |
/or1k/tags/rel-0-3-0-rc2/gdb-5.0/ |
1341 |
Mark wich operand is the destination operand in the architechture definition |
nogj |
7070d 04h |
/or1k/tags/rel-0-3-0-rc2/gdb-5.0/ |
1338 |
l.ff1 instruction added |
andreje |
7086d 01h |
/or1k/tags/rel-0-3-0-rc2/gdb-5.0/ |
1333 |
gcc 3.4 compile fix |
phoenix |
7101d 02h |
/or1k/tags/rel-0-3-0-rc2/gdb-5.0/ |
1330 |
jtag bugfix |
phoenix |
7109d 20h |
/or1k/tags/rel-0-3-0-rc2/gdb-5.0/ |
1256 |
page size is 8192 on or32 |
phoenix |
7417d 21h |
/or1k/tags/rel-0-3-0-rc2/gdb-5.0/ |
1169 |
Added support for l.addc instruction. |
csanchez |
7645d 21h |
/or1k/tags/rel-0-3-0-rc2/gdb-5.0/ |
1152 |
*** empty log message *** |
phoenix |
7726d 00h |
/or1k/tags/rel-0-3-0-rc2/gdb-5.0/ |
1149 |
*** empty log message *** |
phoenix |
7726d 13h |
/or1k/tags/rel-0-3-0-rc2/gdb-5.0/ |
1144 |
Speed up gdb when running with serial targets:
When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)
When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump. |
sfurman |
7728d 20h |
/or1k/tags/rel-0-3-0-rc2/gdb-5.0/ |
1142 |
Speed up gdb when running with serial targets:
When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)
When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump. |
sfurman |
7729d 11h |
/or1k/tags/rel-0-3-0-rc2/gdb-5.0/ |
1124 |
Initialize or1k_implementation with reasonable defaults for the number
of implementation registers. This doesn't affect the jtag or sim
targets at all because those values are always overwritten when
or1k_implementation is initialized. However, it is necessary when
connecting to remote gdb stubs through a serial port or socket, since
or1k_implementation is not yet initialized for those targets. |
sfurman |
7762d 13h |
/or1k/tags/rel-0-3-0-rc2/gdb-5.0/ |
1123 |
Renumber/rename SPRs to match latest architecture doc |
sfurman |
7763d 20h |
/or1k/tags/rel-0-3-0-rc2/gdb-5.0/ |
1115 |
Fix stack-walking code in or1k_frame_chain() and or1k_skip_prologue()
to expect the function prologue that or32 gcc currently emits, rather
than a previous incarnation of the or1k ABI. |
sfurman |
7785d 17h |
/or1k/tags/rel-0-3-0-rc2/gdb-5.0/ |
879 |
Initial version of OpenRISC Custom Unit Compiler added |
markom |
8008d 00h |
/or1k/tags/rel-0-3-0-rc2/gdb-5.0/ |
874 |
Command for displaying trace buffer added. |
simons |
8018d 01h |
/or1k/tags/rel-0-3-0-rc2/gdb-5.0/ |
866 |
after make headers |
markom |
8043d 06h |
/or1k/tags/rel-0-3-0-rc2/gdb-5.0/ |
865 |
true flase bug fixed |
markom |
8045d 01h |
/or1k/tags/rel-0-3-0-rc2/gdb-5.0/ |
850 |
Missig header file. |
simons |
8060d 03h |
/or1k/tags/rel-0-3-0-rc2/gdb-5.0/ |
839 |
elf target bug fixed |
markom |
8077d 08h |
/or1k/tags/rel-0-3-0-rc2/gdb-5.0/ |
813 |
elf support added |
markom |
8092d 03h |
/or1k/tags/rel-0-3-0-rc2/gdb-5.0/ |