OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel-0-3-0-rc2/] [gen_or1k_isa/] - Rev 1765

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
1765 root 5561d 12h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1753 This commit was manufactured by cvs2svn to create tag 'rel-0-3-0-rc2'. 5680d 19h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1748 These are all the changes for Or1ksim 0.3.0 release candidate 1. The changes
are explained in the NEWS, README and ChangeLog files. A number of
long-standing bugs are fixed (see the OpenRISC tracker), and the code is
brought up to a consistent standard, following the GNU coding conventions
throughout.

Argument parsing now uses argtable2, and a User Guide has been added.
Documentation throughout has been extended to be compatible with Doxygen,
providing a further level of technical detail on the internals.		 jeremybennett 5710d 17h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1672 Store instructions don't modify any register. Don't mark them as such in the
arch. definitions		 nogj 6707d 15h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1656 Pass the instruction operands as part of the op_queue structure. nogj 6707d 15h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1605 Execute l.ff1 instruction nogj 6769d 17h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1601 fixed description of l.sfXXXi lampret 6771d 19h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1597 Fix parsing the destination register nogj 6781d 18h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1591 Added l.fl1, fixed desc of l.ff1 lampret 6784d 16h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1590 Added l.fl1 lampret 6784d 16h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1557 Fix most warnings issued by gcc4 nogj 6844d 02h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1554 fixed l.maci encoding phoenix 6861d 13h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1475 l.rfe does not have a delay slot. Don't mark it as such. nogj 6974d 16h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1452 Implement a dynamic recompiler to speed up the execution nogj 7001d 19h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1440 Reclasify l.trap and l.sys to be an exception instruction nogj 7001d 19h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1385 Fix description of the l.mac/l.msb/l.maci instructions nogj 7016d 22h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1384 Fix the parameters to the l.ff1/l.maci instructions nogj 7016d 22h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7051d 17h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1346 Remove the global op structure nogj 7064d 21h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1342 * Fix generate.c to produce a execgen.c with less warnings.
* Fix the --enable-simple configure option.		 nogj 7064d 21h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1341 Mark wich operand is the destination operand in the architechture definition nogj 7064d 22h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1338 l.ff1 instruction added andreje 7080d 19h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1309 removed includes phoenix 7253d 15h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1308 Gyorgy Jeney: extensive cleanup phoenix 7256d 12h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1295 Updated instruction set descriptions. Changed FP instructions encoding. lampret 7278d 12h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1286 Changed desciption of the l.cust5 insns lampret 7327d 15h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1285 Changed desciption of the l.cust5 insns lampret 7327d 15h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1169 Added support for l.addc instruction. csanchez 7640d 15h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1114 Added cvs log keywords lampret 7795d 07h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1113 Typos by Maria Bolado lampret 7795d 07h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.