OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel-0-3-0-rc2/] [or1ksim/] - Rev 644

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
644 Modified logging of SPR accesses. Logging only explicit instruction accesses. ivang 8195d 16h /or1k/tags/rel-0-3-0-rc2/or1ksim/
643 Quick bug fix. ivang 8195d 16h /or1k/tags/rel-0-3-0-rc2/or1ksim/
642 Modified logging of SPR accesses. Logging only explicit instruction accesses. ivang 8195d 16h /or1k/tags/rel-0-3-0-rc2/or1ksim/
641 Modified logging of SPR accesses. Logging only explicit instruction accesses. ivang 8195d 16h /or1k/tags/rel-0-3-0-rc2/or1ksim/
640 Merge profiler and mprofiler with sim. ivang 8195d 18h /or1k/tags/rel-0-3-0-rc2/or1ksim/
639 MMU cache inhibit bit test added. simons 8198d 08h /or1k/tags/rel-0-3-0-rc2/or1ksim/
638 TLBTR CI bit is now working properly. simons 8198d 08h /or1k/tags/rel-0-3-0-rc2/or1ksim/
633 Bug fix in command line parser. ivang 8199d 14h /or1k/tags/rel-0-3-0-rc2/or1ksim/
632 profiler and mprofiler merged into sim. ivang 8200d 09h /or1k/tags/rel-0-3-0-rc2/or1ksim/
631 Real cache access is simulated now. simons 8201d 07h /or1k/tags/rel-0-3-0-rc2/or1ksim/
630 some bug fixes in store buffer analysis markom 8201d 16h /or1k/tags/rel-0-3-0-rc2/or1ksim/
629 typo fixed markom 8201d 20h /or1k/tags/rel-0-3-0-rc2/or1ksim/
627 or32 restored markom 8201d 20h /or1k/tags/rel-0-3-0-rc2/or1ksim/
626 store buffer added markom 8201d 20h /or1k/tags/rel-0-3-0-rc2/or1ksim/
624 Added logging of writes/read to/from SPR registers. ivang 8202d 13h /or1k/tags/rel-0-3-0-rc2/or1ksim/
623 update based on recent changes; arithmetic instructions does not modify carry yet markom 8202d 15h /or1k/tags/rel-0-3-0-rc2/or1ksim/
622 Cache test works on hardware. simons 8202d 18h /or1k/tags/rel-0-3-0-rc2/or1ksim/
621 Cache test works on hardware. simons 8202d 19h /or1k/tags/rel-0-3-0-rc2/or1ksim/
620 use ARITH_SET_FLAG to turn off set flag by arith. instructions markom 8202d 19h /or1k/tags/rel-0-3-0-rc2/or1ksim/
619 all test pass, after newest changes markom 8202d 19h /or1k/tags/rel-0-3-0-rc2/or1ksim/
616 flags test added markom 8205d 14h /or1k/tags/rel-0-3-0-rc2/or1ksim/
615 cmov and extxx instructions; add, addi, and, andi now set flag markom 8205d 14h /or1k/tags/rel-0-3-0-rc2/or1ksim/
612 Tick timer period extended to meet real timing. simons 8206d 20h /or1k/tags/rel-0-3-0-rc2/or1ksim/
611 EEAR register is not changed by trap, sys, int, tick and range exception. simons 8207d 21h /or1k/tags/rel-0-3-0-rc2/or1ksim/
608 Range exception removed from test. simons 8208d 17h /or1k/tags/rel-0-3-0-rc2/or1ksim/
606 raw register range bug fixed; acv_uart test passes markom 8209d 17h /or1k/tags/rel-0-3-0-rc2/or1ksim/
605 simulator prints out a message, when gdb is not attached and stall occurs; OV flag fixed markom 8209d 18h /or1k/tags/rel-0-3-0-rc2/or1ksim/
604 mul test repaired - signed multiplication; obsolete pic test removed; make check pass markom 8209d 18h /or1k/tags/rel-0-3-0-rc2/or1ksim/
600 No more low/high priority interrupts (PICPR removed). Added tick timer exception. simons 8211d 07h /or1k/tags/rel-0-3-0-rc2/or1ksim/
599 No more low/high priority interrupts (PICPR removed). Added tick timer exception. simons 8211d 07h /or1k/tags/rel-0-3-0-rc2/or1ksim/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.