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[/] [or1k/] [tags/] [rel-0-3-0-rc2/] [or1ksim/] [cpu/] - Rev 1471

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Rev Log message Author Age Path
1471 Rewrite the interactive mode handling to also work in the recompiler nogj 7073d 18h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
1452 Implement a dynamic recompiler to speed up the execution nogj 7073d 18h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
1446 Cosmetic fixes nogj 7073d 18h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
1444 Move the definitions needed for the simple execution model out of or32.h and into simpl32_defs.h nogj 7073d 18h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
1442 Replace some problematic calles to mfspr/mtspr with direct access to the spr nogj 7073d 18h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
1440 Reclasify l.trap and l.sys to be an exception instruction nogj 7073d 18h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
1438 NOP_REPORT should report numbers in hex not decimal nogj 7073d 18h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
1436 Rearange some code to make it clearer what it does nogj 7073d 18h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
1434 Fix the prototype of setsim_reg nogj 7073d 18h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
1432 Collect most of the cpu state variables in a structure (cpu_state) nogj 7073d 18h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
1430 Log SPR_SR in the execution log nogj 7073d 18h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
1428 Remove useless indirection: check_depend()->depend_operands() nogj 7073d 18h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
1404 Move the function of ic_clock() to mtspr() and remove it nogj 7073d 18h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
1402 Do what dc_clock() did in mtspr() and remove it nogj 7073d 18h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
1398 Correct incorrect calls to eval_direct8 nogj 7073d 18h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
1386 Rework exception handling nogj 7079d 22h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
1384 Fix the parameters to the l.ff1/l.maci instructions nogj 7088d 22h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
1382 Nir Mor:
Implemented DCCFGR, ICCFGR, DMMUCFGR and IMMUCFGR spr registers.		 nogj 7088d 22h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
1376 aclocal && autoconf && automake phoenix 7107d 22h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
1375 Remove FAST_SIM, it nolonger provides a speed up nogj 7114d 13h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
1362 initialise dev_mem->chip_select in register_memory nogj 7114d 13h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
1359 Pass private data in readfunc/writefunc callbacks nogj 7114d 13h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
1358 Modularise config file parseing. Paving the way for further modularisation. nogj 7114d 13h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
1354 typing fixes phoenix 7122d 19h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
1353 Modularise simulator command parsing nogj 7123d 16h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
1352 Optimise execution history tracking nogj 7123d 16h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7123d 16h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
1346 Remove the global op structure nogj 7136d 20h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
1345 Fix out-of-tree builds nogj 7136d 20h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
1344 * Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes nogj 7136d 20h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/

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