OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel-0-3-0-rc2/] [or1ksim/] [cpu/] - Rev 447

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
447 ITLBMR register bit fields set in order. simons 8278d 06h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
446 ITLBMR register bit fields set in order. simons 8278d 06h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
437 When lsu instruction produce exception registers are preserved. simons 8279d 00h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
433 clkcycle parameter added to configuration markom 8279d 06h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
431 stepping over breakpoint added markom 8279d 07h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
430 dpfault and ipfault exceptions implemented markom 8279d 23h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
429 cache configuration added markom 8279d 23h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
427 memory_table status output; some bugs fixed in configuration loading markom 8280d 00h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
426 memory logging added markom 8280d 01h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
424 memory configuration file joined into .cfg file; *mem.cfg are obsolete; read-only and write-only memory is supported; memory logging is not yet supported; update of testbench - only cache test fails, since it writes to RO memory markom 8280d 04h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
416 IMMU bugs fixed. simons 8282d 14h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
397 removed or16 architecture markom 8293d 02h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
394 dependency joined with dependstats; history moved to sim section markom 8293d 07h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
393 messages: exception on many places changed to abort markom 8293d 07h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
389 Changed default delay for load and store in superscalar cpu. lampret 8293d 17h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
383 modified simmem.cfg structure! ADD markom 8294d 02h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
382 bitmask function bug fixed markom 8294d 03h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
381 number display is more strict with 0x prefix with hex numbers markom 8294d 03h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
378 cleanup in testbench; pc divided into ppc and npc markom 8294d 05h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
377 cleanup in testbench; pc divided into ppc and npc markom 8294d 05h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
374 *** empty log message *** simons 8294d 21h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
371 steps toward joining or32.c and opcode/or32.h of or1ksim and gdb; decode.c moved to or32.c markom 8295d 04h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
361 set config command added; config struct has been divided into two structs - config and runtime; -f option allows multiple config scripts markom 8300d 06h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
355 uart VAPI model improved; changes to MC and eth. markom 8301d 03h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
349 Some bugs regarding cache simulation fixed. simons 8304d 18h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
344 added acv test for uart; sim debug now has verbose levels; lot of bugs fixed in uart model markom 8307d 02h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
327 simulate_dc_mmu_load() was calling insn cache/mmu routines instead of data cache/mmu. Fixed. lampret 8309d 12h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
309 more tests run; added cfg capabilities for tests markom 8312d 23h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
308 testbench now has make check markom 8313d 01h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/
306 corrected lots of bugs markom 8313d 04h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.